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實驗平台~
( {- P" l) [* ]「Terasic」Altera DE0 多媒體開發平台,Cyclone III 3C16 FPGA
$ S% g6 c, W+ P+ ]; ^$ x在建構的過程中(僅放入cpu跟memory ip)* t; K K9 |( f6 f- C& K( O
no reset vector has been specified for this CPU
/ v! i( h, j( J- m- g; K1 R$ Lno exception vector has been specified for this CPU
& n3 `2 f9 y1 l' g( W3 B9 v7 r; i這兩個訊息,沒辦法完全消除,這兩個一定要消除嗎
7 O' N! X- \. L% {% p4 N7 r試過- d6 ^3 @* V3 W7 x/ o2 ^! M
on chip memory
0 t8 b$ e; U, s* y( }8 wsdram
* u/ `/ B2 c8 y$ p% X4 B. d. \* A用上面兩個去試過所有可能的組合(mem/mem,sd/sd,sd/mem,mem/sd)* k+ g, m: t; V1 Q1 K/ ]# m, R
no reset vector has been specified for this CPU0 A# N$ r. G8 e" o, o
no exception vector has been specified for this CPU: b/ D5 J9 i$ `- b
總是會有一個沒辦法去除(先選的訊息會被消除)
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有人有在玩10.1版嗎?請多多幫忙~~
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3 h* q) T6 Z; x! g目前打算~改用10.0sp1跟9.1sp2試試看. y) e" Y6 M7 _' h" w5 b9 ] D; w
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