LVS問題 望大大指點

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使用LEdit90的LVS時，顯示This file is Binary.LVS can not perform iteration.無法進行對比，這是怎麼回事呀

m851055

是比對檔案中路徑的問題，若有需要詳細說明把netlist PO上來................

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原理圖
* SPICE netlist written by S-Edit Win32 7.03
* Written on May 27, 2009 at 16:57:24
8 I* A5 Y, q7 p6 S8 C1 C: d: V* Waveform probing commands
.probe
% h! k7 A$ R0 r# s) K! I0 u5 h6 i; b.options probefilename="G:\tanner\Nand2_1.dat"
+ probesdbfile="G:\與非門2.sdb"
  _8 y* x' Q. o/ }# b1 f6 z4 w  {* v+ probetopmodule="Nand2"
: ~. S0 Z( X9 p( i6 V* Main circuit: Nand2
+ P/ n1 {3 l6 C! @$ tM1 OUT A N4 Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
/ T6 I! C  W# P, a& s( W. [" kM2 Gnd B N4 Gnd NMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
M3 OUT A Vdd Vdd PMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
' C9 P# d8 @5 I2 t3 O, K: m( i4 p7 TM4 OUT B Vdd Vdd PMOS L=2u W=22u AD=66p PD=24u AS=66p PS=24u
4 T8 i/ w  R* x4 m8 `8 \( w* End of main circuit: Nand2

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版圖
* Circuit Extracted by Tanner Research's L-Edit Version 9.00 / Extract Version 9.00 ;
* TDB File:  G:\tanner\Nand2.tdb
* Cell:  Nand2        Version 1.07
( p+ y  }6 _, n1 d" v& b! [7 O* Extract Definition File:  G:\lights.ext
* Extract Date and Time:  05/25/2009 - 15:05
+ j, Y3 `$ R8 P: u4 c* Warning:  Layers with Unassigned AREA Capacitance.
*   <N Well Resistor ID>
*   <Poly Resistor ID>
*   <Poly2 Resistor ID>
8 L# B2 [* L% B8 W# _# F*   <N Diff Resistor ID>
*   <P Diff Resistor ID>
*   <P Base Resistor ID>
* Warning:  Layers with Unassigned FRINGE Capacitance.
*   <N Well Resistor ID>
* q( |  |( k! e6 ^, ?& d*   <Poly Resistor ID>
( a, l* O/ ~5 }/ |*   <Poly2 Resistor ID>
; f; X/ E% p* U2 R: G*   <N Diff Resistor ID>
7 W+ l' |0 z' h: w, K- s( Z# Z, ^" {*   <P Diff Resistor ID>
*   <P Base Resistor ID>
*   <Pad Comment>
*   <Poly1-Poly2 Capacitor ID>
* Warning:  Layers with Zero Resistance.
5 X4 G) ]# E" h: o2 U% m. T*   <NMOS Capacitor ID>
# d9 J1 ~. N3 ]! \*   <PMOS Capacitor ID>
*   <Pad Comment>
7 p6 h0 P  {% J; L5 {*   <Poly1-Poly2 Capacitor ID>
; K+ J! p. H' b& e  s
* NODE NAME ALIASES
1 Y: m1 C  w9 ]( P! g*       1 = B (12,-14)
5 G( X" ~5 F/ q0 u& Q4 {9 O*       2 = A (-16,-18)
% j  @0 t: o6 I, R( W*       3 = OUT (-2,-21)
' S! [" V" E  e- l' N) u' w( `*       4 = GND (-30,-35)
*       5 = Vdd (-32,14)
/ l5 W5 u0 E8 H( mM1 Vdd B OUT Vdd PMOS L=2u W=6u
" K" H6 T( t% I1 I3 |" g! J' y) E2 V5 j* M1 DRAIN GATE SOURCE BULK (3 -3 5 3)
M2 OUT A Vdd Vdd PMOS L=2u W=6u
* M2 DRAIN GATE SOURCE BULK (-5 -3 -3 3)
5 c: D2 u- V& k% }' G: {/ k. nM3 OUT B 6 GND NMOS L=2u W=6u
5 |- Y1 ?6 F) O; x) P* M3 DRAIN GATE SOURCE BULK (3 -31 5 -25)
1 J7 d4 Z5 X% b9 QM4 6 A GND GND NMOS L=2u W=6u
, g6 r8 \- e+ m* M4 DRAIN GATE SOURCE BULK (-5 -31 -3 -25)
: s& u, ?7 Q/ ^" ~* Total Nodes: 6
& l- B2 C- f+ }. B# G+ }2 P8 B* Total Elements: 4
) V# V+ g2 x. s  ?# ~. b* Total Number of Shorted Elements not written to the SPICE file: 0
* Extract Elapsed Time: 0 seconds
4 V8 j. r; i9 q( ?8 y8 g7 b) @.END

m851055

與非門2 files name改為英文名稱.......................

xjyy

我宅了一周 沒想到栽在路徑上  萬分感謝 ！！！！！！！！！！