Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits

semico_ljj

Layout Optimization on ESD Diodes for Giga-Hz RF and High-Speed I/O Circuits
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semico_ljj

Abstract -- The diode operated in forward-biased condition has
been widely used as an effective on-chip ESD protection device at
$ K/ ]1 B5 T, G% OGHz RF and high-speed I/O pads due to the small parasitic
# p- G* G6 z2 q( t0 Rloading effect and high ESD robustness in CMOS integrated
* y  P/ C  w& }% Y) L! g9 ]6 l7 }circuits (ICs). This work presents new ESD protection diodes
* W1 U+ w/ A' G% o9 Zrealized in the octagon, waffle-hollow, and octagon-hollow layout
0 p; B0 g- g5 x* [% _" Lstyles to improve the efficiency of ESD current distribution and
7 C" [: i/ {/ E4 O  j6 C! uto reduce the parasitic capacitance. The new ESD protection
8 J7 r- A& C8 C' e$ X# sdiodes can achieve smaller parasitic capacitance under the same
ESD robustness level as compared to the waffle diode. Therefore,
: k9 e- b+ U$ d. c$ lthe signal degradation of GHz RF and high-speed transmission
can be reduced due to smaller parasitic capacitance from the new
' z$ B9 J- S9 S2 v+ r/ A/ V9 M5 M4 ?proposed diodes.

xp212125o

看起來有幫助
* {% L7 i3 s6 Y7 Q  D感謝分享
% z3 p" i( D# m8 D, o& P( ?先下載來看看
# g* b. Y  x% y0 N: f1 f4 o2 A& dthank you ~

linyuejing

下載來看看
$ y/ n1 _: V8 G& l! l下載來看看
" n1 g3 s& H; u! Q2 {+ W3 b下載來看看
下載來看看
) t; m  T- `. E4 |0 k應該有幫助
$ {, f. L4 O- |" y/ T4 r謝謝囉

caesarxl

谢谢楼主分享，非常感谢

oika_51

看起來有幫助
6 T2 ]4 D5 S9 R0 G- ^3 v8 z感謝分享

linger809

Abstract -- The diode operated in forward-biased condition has
# \2 M) k; n' U- [5 S+ ]8 ?been widely used as an effective on-c ...
6 |" Z7 V  {* F: C0 H1 Usemico_ljj 發表於 2010-6-25 08:50 AM

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0 C2 Z! y' Z4 G! D不知道这种形式的ＩＯ有没有经过测试，实际的效果和预想的有多少的差别，thanks!

oscargo

正為ESD耐受度傷腦筋----

zhifj86

thank you very much for your sharing

sslin

謝謝大大的分享~~知識因分享而壯大！

~只有站在巨人的肩膀上才不會被食人族吃了!