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實驗平台~9 T) G/ B! l; w7 ]1 Y
「Terasic」Altera DE0 多媒體開發平台,Cyclone III 3C16 FPGA
: Y, T% k0 N" @4 t+ ~6 Q- u. b在建構的過程中(僅放入cpu跟memory ip)# e7 y/ O/ x5 a+ I* z" W
no reset vector has been specified for this CPU8 P* b/ s: }% g* D* r
no exception vector has been specified for this CPU/ z, G3 E% q" r! b8 K
這兩個訊息,沒辦法完全消除,這兩個一定要消除嗎
8 W, T+ W9 z+ \5 U% j( d試過
1 ?3 l. P- q& V o: |- ?0 W' e" D* Hon chip memory( y6 y8 E" a3 O. B
sdram
% C+ r- z. i3 z用上面兩個去試過所有可能的組合(mem/mem,sd/sd,sd/mem,mem/sd)
( I1 J o+ s3 c. H A" dno reset vector has been specified for this CPU' m: ]6 j% K. q7 ^
no exception vector has been specified for this CPU
6 T1 _) |& _4 p7 }總是會有一個沒辦法去除(先選的訊息會被消除)' e6 k b2 S% x1 S
. f' A' k. n6 O* [有人有在玩10.1版嗎?請多多幫忙~~; v4 d2 M/ \. V3 O, ]( P
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目前打算~改用10.0sp1跟9.1sp2試試看
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THX~ |
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