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AMD Geode LX 800@0.9W處理器 II
Display Controller; W4 J8 v" K- g
■ Hardware frame buffer compression improves Unified* v( I; v, J, R0 B, I- ~& k7 N
Memory Architecture (UMA) memory efficiency- t6 c' s3 i2 p3 u, t' f
■ CRT resolutions supported:9 d! P' U! D" |3 D$ G) B' h
— Supports up to 1920x1440x32 bpp at 85 Hz
& r- Y( F- w3 O5 |3 W5 ]' D— Supports up to 1600x1200x32 bpp at 100 Hz) n! L9 p }( X. r# N) t
■ Supports up to 1600x1200x32 bpp at 60 Hz for TFT
' ]. }( [# z2 G7 _! P9 i, \+ R Y■ Standard Definition (SD) resolution for Video Output3 `+ K' \5 F, i0 u% z- x
Port (VOP):$ Z* j, D. s6 ]. i$ A6 S) r
— 720x482 at 59.94 Hz interlaced for NTSC# o% l# ~- e- H0 A
— 768x576 at 50 Hz interlaced for PAL
+ C# F5 G9 f9 S. B■ High Definition (HD) resolution for Video Output Port
' o" h; O5 l9 u! S0 {( h(VOP):
" |3 e1 S$ ^# ]: |0 T— Up to 1920x1080 at 30 Hz interlaced (1080i HD)
# f8 Z) O2 d/ u7 H6 l3 N( F(74.25 MHz)$ K j" n, y+ U+ [* q
— Up to 1280x720 at 60 Hz progressive (720p HD)0 q+ z! B' L' b7 ~
(74.25 MHz)
H! I6 p: e% J6 _' ]/ D, j2 ?■ Supports down to 7.652 MHz Dot Clock (320x240
3 T X' a% g7 y" M" VQVGA)
7 ~ C. Z. p& P7 _■ Hardware VGA1 u8 J' V$ y$ M% M
■ Hardware supported 48x64 32-bit cursor with alpha
8 P; ?1 ?7 d$ Jblending. j5 u6 U' P8 z" ~( m
Video Processor
' r, r7 y! I% Y1 o) S■ Supports video scaling, mixing and VOP, z) m8 s; f# r6 c/ h/ `6 g7 ~9 M$ H
■ Hardware video up/down scalar& V0 Q1 M0 S/ Q6 l7 M7 Q1 G
■ Graphics/video alpha blending and color key muxing6 |) C* O X) n; @3 }8 Y
■ Digital VOP (SD and HD) or TFT outputs/ s, L9 [5 c9 o
■ Legacy RGB mode; R/ Q" j& l Q0 _" v3 q4 Y' T
■ VOP supports SD and HD 480p, 480i, 720p, and 1080i
8 _0 {( t1 x4 z8 k■ VESA 1.1, 2.0 and BT.601 24-bit (out only), BT.6567 H. N! V& r1 j1 _. E& `5 l. L
compliant
7 s+ M/ w1 r, V/ p( ]) x8 |$ TIntegrated Analog CRT DAC, System Clock PLLs and( N, {# B2 e7 S
Dot Clock PLL/ ?& A2 r* E4 ^
■ Integrated Dot Clock PLL with up to 350 MHz clock- W9 r+ s' u' Y% p% ^
■ Integrated 3x8-bit DAC with up to 350 MHz sampling8 u- L. C9 @( t. o' H8 T
■ Integrated x86 core PLL$ ?; j# [0 {! ]* q
■ Memory PLL
$ G4 |* @4 Y Y9 R+ o" lGeodeLink™ PCI Bridge7 U$ V" U: I4 ]
■ PCI 2.2 compliant* L2 a9 ~$ F1 u& {7 {; [
■ 3.3V signaling and 3.3V I/Os
1 O z+ ~) g, W■ 33 to 66 MHz operation
7 M( @1 T4 C& X4 Z/ ^. T' |■ 32-bit interface
+ k8 ?% B5 |! v& ~# {, {3 l6 |9 h! a+ i■ Supports virtual PCI headers for GeodeLink devices
7 x8 k* T: t. c: V! C/ uVideo Input Port (VIP) U4 e% E3 k* ` M2 v4 [0 i
■ VESA 1.1 and 2.0 compliant, 8 or 16-bit) Q$ O9 d, v) u: q! X( R
■ Video Blanking Interval (VBI) support
' ^6 ~9 x3 G9 y4 t( v$ p' k. ?■ 8 or 16-bit 80 MHz SD or HD capable
5 g5 f/ F% J5 T) d! O5 Q5 O* HSecurity Block. H7 _+ d0 {, K* p" L& T
■ Serial EEPROM interface for 2K bit unique ID and AES y8 A9 W5 J* d% ?% H: }% @# r
(Advanced Encryption Standard) hidden key storage
% k; e* o. i _1 O% G(EEPROM optional inside package)$ z9 c. J- o0 ~: C% G) s
■ Electronic Code Book (ECB) or Cipher Block Chaining
! [$ l& N- U9 a2 ^0 z! t! N(CBC)128-bit AES hardware support
# O, v/ b9 g/ ?' a■ True random number generator (TRNG) |
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