Item% S+ |0 Z( j+ G2 R: D, `
| SH77722 (SH-NaviJ2) Specifications( D! i. R, l. V; W+ ~" o( i
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Type name
- Y6 D% H* X. V( C9 r | R8A77722DA01BGV
" | s4 B% x1 E. ] ]) q- J8 U | R8A77722DA02BGV
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Power supply voltage0 D! ]9 T7 P' x6 y0 M* C- ~
| 1.15 to 1.3 V (internal),
7 G2 F' m3 h1 B7 f& ?, T: S3.3 V and 1.8 V (external)
" C. @ G, f9 I% |8 [4 x7 k: a& o | 1.2 to 1.35 V (internal), 5 {) R1 b5 n! [: Y0 s h3 Y
3.3 V and 1.8 V (external)
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Maximum operating frequency; t3 Z, i6 F' l& }
| 336 MHz
, Q8 i3 q* W3 M' o: c2 _4 H( f | 400 MHz3 O L8 v$ C. u* _1 S" l
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Processing performance! x7 F$ y4 s$ Z' O2 {7 a9 _# c
| 600MIPS, 2.3GFLOPS# j5 F; c4 y' N% ?/ [6 X
| 720MIPS, 2.8GFLOPS
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CPU core# U% a; Y- T7 I7 ~* y3 O
| SH-4A core' @0 h8 s( b( s( J; W
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On-chip RAM4 y$ i" Y# R: a; x: L) c
| ILRAM: 16 Kbytes
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Cache memory
$ l$ J: ? i/ ^& d% U8 i- X | 4-way set associative type with separate 32 Kbytes for instructions and 32 Kbytes for data
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External memory
- P5 U u' a8 O- ~0 z% z9 ` | DDR2-SDRAM (data transfer rate: 336 MHz) directly connectable to dedicated DDR2 bus
/ {9 e3 u$ w w6 l | DDR2-SDRAM (data transfer rate: 266 MHz) directly connectable to dedicated DDR2 bus
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SRAM or ROM directly connected to extension bus
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Extension bus
$ N" h& W8 a% `, B | Address space: 64 Mbytes × 3
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Main on-chip peripheral functions. U2 u I% U. G& O3 ?
| Renesas Graphics processor(2D/3D)* e! ~" X: Z- `! Q4 B
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Display control: outputs for two screens (digital RGB and LVDS)% |4 ]8 N) j/ f" {
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Video input interface$ f/ Z: y: v6 y7 n! J! P
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SD card host interface × 2 channels' | V8 t% p( ^' d
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USB 2.0 host/function interface, k4 \7 v% i; r0 U
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FM multiplex decoder& V8 c* i" n3 e: k( u r5 ]
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Controller area network (RCAN) interface × 2 channels0 R& m! r6 x7 ^, o+ V) s
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MOST interface module5 x4 \& \1 ]1 C9 H2 W
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Various audio interfaces × 4 channels, ?: K; V" u( ]
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Dedicated DMAC × 26 channels4 g; H4 T+ n' S. m" @
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I2C bus interface × 2 channels
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Serial communication interface (SCIF) × 8 channels
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Remote control interface × 1 channel& m; J7 } \6 n. @, M
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A/D converter (10-bit) × 4 channels6 l6 F, H# C6 X6 E2 R% N/ t' h, l
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Timer × 9 channels, r2 O9 [( s5 B
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On-chip debugging function% _# t% \% G: b/ ^2 g! v
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Interrupt controller (INTC)
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Clock pulse generator (CPG): built-in PLL frequency multiplier, D/ R# x8 i G2 E: v4 p0 n
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Power-down modes
) b; {- [+ x3 d | Sleep mode
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Module standby mode
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DDR-SDRAM power supply backup mode" _& X' K. a* r, O, W/ O) |
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Package0 D7 Z7 L; J, w0 f/ J6 ?! V
| 449-pin BGA (21 mm × 21 mm)
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