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Refer to "HSPICE User's Manual: Elements and Device Models Vol.II"
0 N$ ^0 u. E3 L* {3 OAn example for your reference...
4 f5 h, ~ V _
+ n/ N+ n ~7 f* p# g R3 d----------------------------------------------------------------
! ~% V7 j* }6 X***** Gate Capacitance Plots *****
, p$ f( V6 U) o4 U$ I4 W# F.lib 'your_component_model' lib_corner3 @) u* H4 v) M6 m' Z
.temp operational_temp' z0 ]* t- b2 Y. ~$ f' `
.option dccap=1 post9 ]' j- o; S9 C8 E @6 P/ l. F$ x7 B
m1 n_drain n_gate gnd n_bulk l=0.8u w=100u ad=200e-12 as=200e-12
. R4 C4 I* W0 G/ ?% j! jvd n_drain gnd 0
7 T' t9 Y. u4 J6 P" l) Ovg n_gate gnd 57 x5 v, A; b) V5 b$ ]0 }
vb n_bulk gnd 0( [3 F9 b. k4 {( Q4 Z+ D
.dc vd 0 5.0 0.1
" t* _# x+ [9 v2 ]% q; c- w9 I" a.print CGG=lx18(m1)# p+ ~# P! a8 {4 H1 j. q1 q$ Q
+ CGD=par('-lx19(m1)')
% L$ ]4 e% d6 ^8 t& o9 F+ CGS=par('-lx20(m1)') P0 v3 Q) x) X6 g9 ~
+ CDG=par('-lx32(m1)')" T+ R6 n& J# x% A! t
+ CSG=par('lx18(m1) + lx21(m1) + lx32(m1)')
, t0 w3 B8 [# n& Z0 t/ U6 F+ CGB=par('lx18(m1) + lx19(m1) + lx20(m1)')! ]6 J0 @. I- N1 U7 @
.ends
! H. @+ N1 s% p! l: K. o# }; x* W+ w1 b7 D% C
----------------------------------------------------------------
]" b5 H, z6 G& A. S8 d) T3 jSix capacitance are reported in the operating point printout x$ H$ {* K! D" w
cd_total = dQD/dVD' y+ W! Y) r3 \
cg_total = dQG/dVG
2 p' c6 ~% u" Q6 s1 }# j0 D cs_total = dQS/dVS
/ \' M3 E9 P, ^2 n cb_total = dQB/dVB/ [& ?0 t/ n+ e; q% T
cgs = -dQG/dVS( R& m% R1 q$ `
cgd = -dQG/dVD; s p* y! A3 o p, Z w5 [
There capcitances include gate-drain, gate-source, and gate-bulk
* B$ w! w) b( x+ xoverlap capacitance, and drain-bulk and source-bulk diode capacitance.
0 ]% q1 e) M' b0 p% g5 o$ T5 z# C! t" r4 [! k
CGG = dQg/dVG
! I( ~9 X* L2 y) }9 k6 t4 y- |CGD = -dQg/dVD
" Z: ^3 p9 ~ t% |" n! w* qCDG = -dQD/dVG6 Q4 L- `: q5 I
( |' k7 E$ j; n
The MOS element template printouts for gate capacitance are LX18~LX237 M9 Y" E1 \8 R! M' [4 I* h# M- A
and LX32~LX34.3 _( W0 H9 K; _; h
+ d0 D- Q0 j$ ^4 x) E) m! r: sLX18(m) = dQG/dVGB = CGGBO
. G. o9 u+ B& [; ?# O8 d* @LX19(m) = dQG/dVDB = CGDBO+ \, @2 v* K) i! N) r
LX20(m) = dQG/dVSB = CGSBO
0 s6 L2 t" D; @/ j; o+ C! n
# e3 Z. R" Y# pLX21(m) = dQB/dVGB = CGGBO
& B3 `, E; F" F: T8 m" k, d/ z E: o7 ULX22(m) = dQB/dVDB = CGGBO
7 w1 J& K7 e; m, B( gLX23(m) = dQB/dVSB = CGGBO
, N: m! c! z! M: @# o E2 o' ~2 d; k# ]/ r4 c5 I ]* k
LX32(m) = dQD/dVG = CDGBO
$ t/ C' s) z( x2 L5 D: b9 G/ ]LX33(m) = dQD/dVD = CDDBO
! [9 F% v! ^) c$ b9 V3 zLX34(m) = dQD/dVS = CDSBO
! L. i) c8 T! x& A8 k& Q# C
, f2 n+ I% ]+ a9 _7 }1 A& `The equation shown above is for an NMOS with source-bulk grounded4 K8 j. K `" ^1 @! e9 `
configuration. Refer to the user's manual for more detail ^^ |
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