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PLD的定義
開版的大大講的很清楚了0 R' s9 P4 [; K2 h8 n0 i
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補充一點東東: PLD definition
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$ I/ b' d H1 a9 @& M3 }A Programmable Logic Device (PLD), is composed of two types of gate arrays: the AND array and the OR array, thus providing for sum of products algorithmic representations. PLDs include three distinct types of chips: PROMs, PALs, and PLAs. The most flexible device is the PLA (programmable logic array) in which both the AND and OR gate arrays are programmable. In the PROM device, only the OR gate array is programmable. In the PAL device, only the AND gate array is programmable. PLDs are programmed by blowing the fuses along the paths that must be disconnected. FPGAs and CPLDs are classes of PLDs.) I4 e- a, J# X" E1 [3 h9 j7 J2 Z5 R
5 _1 `: Q$ K( ]9 h5 I" _所以PLD是個總稱, CPLD則是PAL, GAL的進階版 |
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