EDA戰雲密佈！RD戰力分析？

ranica

Field Applications Engineer

# H! T4 l! E# y1 l, o- {公      司：One world top EDA company
工作地点：北京
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% b' M# h6 |7 F* E& f! oPosition Description:      
3 Q$ g$ z: A& p- The Field Applications Engineer is responsible for working directly with customers in key technical pre-sales and post-sales roles to provide architectural and design consulting on the best use of Intellectual Property software programmable cores in various different applications including Wireless Communications, Audio processing as well as Image pre and post processing in a customer''s ASIC design.
, i. ]# y* L$ n5 f- O' l8 P, v- DPU cores are used by the world leading semiconductor development and supplier companies. As the Field Applications Engineer, you will be working with customers on the next generation designs. In the Wireless Communications application, customers are using cores in their 2G, 3G, 4G (LTE and LTE-Advanced) modem systems for User Equipment and Infrastructure products. You will be working with industry leading customers on their next generation designs.
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. v+ \& w+ m9 o5 o: F. R6 XResponsibilities:
- Provide technical presentations, seminars, and demonstrations of products, and working closely with the field sales organization to achieve revenue targets
-Fulfill a pre-sales role that includes providing technical insight about products to prospects, optimization of customer''s software code during an evaluation, and processor performance and implementation benchmarking
-Manage technical accounts and champion customers’ technical issues within the company
8 X. g6 H6 }: \% R+ O% \-Primary responsibility for assigned areas and other duties as required

Position Requirements:
  Q) i# M# {, W9 o% V1 v4 a-BS in EE/CS or equivalent and 6+ years’ industry and technology experience with 4+ years experience as a Field Applications Engineer or Applications Engineer
-Experience with DSP architectures, DSP filter programming
/ V, ]8 q1 E1 _. ?4 S-Experience and understanding of 3G and 4G PHY (Layer 1) algorithms
. M5 R& U/ C, ?( y: n2 Y( ]-Experience and understanding of ASIC SoC design and implementation is a big plus
1 W) m' v6 r+ A* ^; D3 P5 I# H, N-Prior FAE/AE experience is desired. An MS in EE/CS is preferred. Some degree of travel may be involved, depending on location and need

ranica

IC CAD 工程师

公      司：A famous IC company
+ u* k: |% b) }; c- R! p) _9 T工作地点：上海

职位描述
1 M, f1 h7 H2 i5 D  k5 i# n1、IC设计研发团队服务器的搭建与管理，保证服务器的稳定、高效以及数据安全；
2、负责EDA工具及相关license的安装和维护,优化相关环境变量及软件设置，确保设计环境的正常运作，提升自动化程度；
- L5 B+ F7 u/ Q. D; X  a3、为IC设计提供EDA工具技术支持及项目支持，使用perl,shell以及tcl等编写自动化脚本，优化设计流程，提高设计工作效率；
4、协助完善IC设计流程。
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岗位要求：
9 b+ t* t& H  S& T1、计算机、自动化及电子相关专业本科以上学历；
2、两年以上相关工作经验；
3、具备撰写Perl/ C-shell/TCL等编程脚本的技巧和能力；
4、熟悉UNIX/LINUX操作系统，熟悉多种EDA工具；
5、具有IC设计软件使用经验或了解IC设计流程相关知识者优先考虑；
" t8 n. r# r1 X% T( o# ]* ]6. 具有良好的沟通能力、分析问题能力、较强的协调能力，以及团队合作意识。

ranica

Senior Engineering Manager
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( c6 G  T' @( l7 _7 A. s+ h- R公      司：One world top EDA company
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) Q, f. f6 \2 y4 F9 z8 [9 r+ kPosition Description  
* P) [5 k4 w! r, p6 k8 ~1. World’s leading design companies rely on xx technologies to deliver the latest design innovations in consumer,
mobile and enterprise electronics. We are looking for a strong software engineering leader to join our team and contribute to the continued growth and success of the company’s flagship products, including ADE and AMS Designer.
9 h# O, N) A' S! n4 Z2. In this high-impact career opportunity you will be responsible for delivery of cutting-edge features in mixed-signal simulation and the Virtuoso environment, including technology leadership, team development and people management.
3. You will also work with a cross-functional team in Beijing and North America to ensure that our software is developed, tested, and documented with high quality.

Position Requirements  
Requirements:
1. Experience managing software development teams in the EDA or related industry
2. Successful delivery of software products over multiple release cycles
3 C  o' C* _( W* f! e3 H$ H; A: @3. Proficiency with build and version-control systems
4. Strong software engineering skills in C/C++ and familiarity with Linux/Unix development
5. Excellent written and oral English communication skills

Preferred skills:
% i( N! [) s: c& ]; k: U1. Prior experience with analog, digital or mixed-signal simulation using SPICE, Spectre and Verilog languages
6 P: a1 S, ]1 U& I" Q2 W  z2. Exposure to the Virtuoso environment or other electronic design platforms
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! x" T1 x2 W, KEducation:
B.S. or higher in engineering, computer science or related field.