SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization | 7/14/2010 |
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success | 7/7/2010 |
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform | 6/17/2010 ; n1 L" j0 A# v4 d
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PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances | 6/17/2010 |
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology | 6/17/2010 ^5 t. J' m3 ?1 H7 y
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Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories | 6/17/2010 |
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup | 6/17/2010 |
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.05 v" c4 |; d; F
| 6/11/2010 ' f2 @7 `) {3 @ Z. J
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Synopsys to Acquire Virage Logic + w# ]: D$ ^7 f) V& \6 Z3 [
| 6/11/2010
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Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard
5 O2 P* g2 |' A/ ^/ G w I | 6/7/2010
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Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs # {( D+ t1 l1 N. P: r% q
| 6/4/2010 M& b2 I r, H+ @2 G; K# g
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Synopsys Press Publishes "The Ten Commandments for Effective Standards" . ~; G* `5 ^6 S7 `3 B5 k4 u
| 6/4/2010
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Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology
, r5 s( m S( _8 N# p0 C+ @) } | 5/13/2010 ; f" q2 s1 r/ D3 t" ]
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Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm + L& G3 Q$ j' }& s/ _
| 5/7/2010 ' v7 U4 d, o5 _3 L3 u7 p5 @3 n, L
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Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature
2 m6 Q4 d" w2 ^1 G; S4 f0 C | 5/7/2010
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Synopsys Launches Industrys First MIPI DigRF v4 IP
2 s2 J7 n& m' d, ^9 A2 }& Z | 5/3/2010 ! g5 t, p" e( ?% B. D( D
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New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces
: i' \. h8 `" ~, X/ Q" `( ~ | 4/28/2010
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Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs 2 H. _4 X s% Y8 C
| 4/22/2010 8 J1 [' a4 b7 m& b; ~( r) z% g" o" k
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Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems
; c% V7 S* d+ i8 S7 j | 4/19/2010 ! C9 O N) }/ }$ c
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Synopsys Expands IP OEM Partner Program with Two New Members
2 @' ~" H/ t ^* g | 4/14/2010
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Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY g* u1 F, Y& C& _
| 4/7/2010 $ B6 ^) k( j! Z/ X0 E0 W3 }, V k
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Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification
% N7 _/ a l" h) t* T: h1 H( K% Y | 4/5/2010
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SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family
; B) H y7 B6 {: W" U( A | 4/1/2010
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Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product
1 _4 y$ x& ]3 h | 3/30/2010 r8 ?, k$ C( a
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Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route
8 Q, y* i2 ~- z | 3/29/2010
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Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions
* N4 A' H9 t2 P9 @0 h3 N! o | 3/23/2010 $ n+ N3 V; R: T5 d( g1 j
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Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development 8 S6 t, Y. N# y. q( Z6 i! P6 |
| 3/23/2010
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Synopsys Completes Acquisition of CoWare
`& i6 s3 W2 e1 K' I/ x | 3/23/2010
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IMEC and Synopsys Collaborate on 3D Stacked IC Development ( m; I/ L4 P# d; _7 R" f0 r$ G
| 3/10/2010
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Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction
* v2 c) P2 D W/ Z8 i% `3 C | 3/10/2010
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Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical 4 Z5 a( t: ^# G2 ^0 b& ~, a
| 2/9/2010 9 R0 {- a4 U& P u/ j
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APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services
0 B3 z1 d6 E6 L0 a+ j | 2/8/2010 # f+ \' A# w) w0 U
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Synopsys to Acquire CoWare . b$ M4 P u0 u# v
| 2/8/2010 : H7 E5 b: p, H5 m5 y( {# a5 u
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Synopsys Acquires VaST Systems Technology ( W. F4 c6 Y7 c2 q7 @; e! P9 D# ?8 x
| 2/3/2010
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Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions + {8 s6 E! M8 S' N0 u* H2 m
| 1/25/2010
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Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies
( h) ~5 l0 ^% d. F1 j | 1/25/2010 $ {& D. E) Q( B9 x, H; H
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Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology
, S( g& O* L/ q% H$ t0 P | 1/25/2010 4 e. s4 @ Y- B( N/ |
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Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs : D9 N8 K7 @, ]( z# G3 P, Y, Y
| 1/13/2010
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Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models
3 A& f' {5 E! O/ B, i$ r | 1/12/2010 6 O$ E3 V1 l5 f3 L7 c& f8 a' z0 R4 Y
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Synopsys Multicore Technology Speeds Timing Sign-Off by 2X
* {! |# C4 {; _- A& i$ S | 1/11/2010
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