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Staff PnR/CAD Engineer8 I3 W* W- Z3 W% w
公 司:NO.82-A famous IC company
* _' R& Z; t7 I5 x9 z工作地点:上海; ?& C, m3 m {9 l
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Responsibilities) ^; a3 W, W r; {* y
1. IC Place and Route for designs up to a few million gates in deep sub micron technology, with advanced low power flow; Timing, Power, IR drop and Noise analysis
* a$ p# y2 |; C% [( N/ w2. DRC/LVS command file, rule deck and chip tape-out handling and support;- _6 |$ h- G& J6 ^% H
3. IC-CAD tool and design flow support
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! a, U' u6 d: x$ ^* yMandatory Skills2 D) i) X: f' X# {
1. Place and Route in deep sub micron technology; timing, power, IR drop and noise analysis( J- W, V& ~% P* h' n
2. In depth understanding of IC layout and command files, IC process flow
3 Z& S v8 W/ g9 v3. Good knowledge of Linux/Unix and ICCAD tools. Y1 \- R* x' u
4. Good knowledge of digital and analog IC design flow
( }% [1 J! F, J9 h% v& v5. Scripting language and file/database conversion techniques3 I& F) q& A3 X2 x5 r( M
6. Fluent in English8 g/ L# J1 z( S" B; k1 e3 `* D' W
% M4 L9 g) ]! Y9 x% WPreferred Skills
& j' o+ ]2 H- Y1. IC hand-crafting layout design
+ a1 k+ V4 r1 A1 P3 Y& m$ k2. VLSI design and verification
( t* r) X Y5 j, U: D- h3. Library design and characterization
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Education
# p8 }# e3 k. @5 \7 @University Degree of Microelectronics, Electrical Engineering or Computer Science,
# B& ], p# L) z7 c5 J) i7 XMaster degree preferred! C0 Z1 Y4 U# O" J/ |
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Experience
0 [; a. p5 ~" y# M3 g# S8+ years of working experience, 2+ experience in US or Europe based ICCompany.) g" w, T$ O' P9 {
3+ years of experience in Place and Route9 e( H# W0 k: }9 d9 n
3+ years of experience in IC-CAD, CAE or tape-out handling |
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