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Calibration techniques in nyquist AD converters

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發表於 2008-3-11 11:50:59 | 顯示全部樓層 |閱讀模式
Table of contents/ N  D/ |# F: E1 U5 ]
List of abbreviations9 {. Q# y: ^9 b6 y+ T7 k
List of symbols8 D( Y. x  B% O! S/ b
Preface
' G) S# _* g+ ~0 D7 `; `% \1 Introduction 1! ?) l; c( k! B
1.1 A/Dconversion systems . . . . . . . . . . . . . . . . . . . . . . 1- X& i  k" T: Q1 t: g. R
1.2 Motivation and objectives . . . . . . . . . . . . . . . . . . . . . . 5
* \. u/ n* J4 a/ D1.3 Layout of the book . . . . . . . . . . . . . . . . . . . . . . . . . 5
) R: M& {7 Q" O, L7 R6 j3 }2 Accuracy, speed and power relation 7" d- h4 t9 m8 X4 L  l
2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
4 @  V' B% c: X8 k# t8 A& h$ i" b6 ~2.2 IC-technology accuracy limitations . . . . . . . . . . . . . . . . . 8, Q) _( l3 n! S% d) b
2.2.1 Process mismatch . . . . . . . . . . . . . . . . . . . . . . 8" o) w  ?# y( _, }% Q0 e9 n5 g
2.2.29 m2 Y* R: M* a
2.2.3 Matching versus noise requirements . . . . . . . . . . . . 11, a: K* m3 v& l2 \
2.3 Speed and power . . . . . . . . . . . . . . . . . . . . . . . . . . 11% B% g2 h1 u4 T4 g4 e
2.4 Maximumspeed . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
0 \% |' q3 x6 g% a7 M2.5 . . . . . . . . . . . . . . . . . . . . . 15
% i% q  _, d" e' z2.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18: M1 Z0 d2 C& o+ c! Q7 j# o
3 A/D converter architecture comparison 21" c, k2 t" K5 G' s5 h7 e" k
3.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21* X" h3 y. d# E) m' f
3.2 Flash . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
# H3 M+ w+ Z, t1 K3 a4 v9 M+ f3.2.1 Fullflash . . . . . . . . . . . . . . . . . . . . . . . . . . 23
& s7 L, S% M1 y/ P. m- Y3.2.2 Interpolation . . . . . . . . . . . . . . . . . . . . . . . . 26
) b6 W; ]* L( t6 ]3 A5 l, @3.2.3 Averaging . . . . . . . . . . . . . . . . . . . . . . . . . . 29
: y9 ^1 G" O! Z8 R; Y5 T. |3.3 Folding and interpolation . . . . . . . . . . . . . . . . . . . . . . 33; M* b. @. I2 q/ p8 V+ Q3 j" G- Y2 h
3.4 Two-step . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
: |# G/ _7 h! j- O# O% l0 G1 u3 UThermal noise . . . . . . . . . . . . . . . . . . . . . . . 10
3 U1 W/ E, [1 U, D; H1 QCMOS technology trends
* b( R9 X: S7 r) u2 ]. R, K& kxi
& w5 a1 _. U0 n3 y3 ]! V* W; E! Zxiii8 [! k5 S/ }4 F
xvii! ]4 w- `% w( L7 g2 U" e9 y& p6 M
Table of contents
3 @5 E+ [! s& [' q, P; R3.5 Pipe-line . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46( ?$ ?3 R/ q0 E7 S% O
3.6 Successive approximation . . . . . . . . . . . . . . . . . . . . . . 54) I4 u1 _7 I+ N0 R2 S' ]# ]) ]
3.7 Theoretical power consumption comparison . . . . . . . . . . . . 56* A5 F5 O$ N, ^' K+ z
3.7.1 Figure-of-Merit (FoM) . . . . . . . . . . . . . . . . . . . 57  S& H$ h: N" X% j
3.7.2 Architecture comparison as a function of the resolution . . 572 R. W7 K" w! }/ v3 [( r
3.7.3 Architecture comparison as a function of the sampling speed 65
7 }& [9 O6 I! d+ T6 Y3.8 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66+ a5 ~5 Q* n- B6 h, e1 g- H5 O
4 Enhancement techniques for two-step A/D converters 67
9 G% S+ B+ B! e; x  m9 E4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67( h! @! f$ _: [5 N! L- t
4.2 Error sources ina two-step architecture . . . . . . . . . . . . . . 67
) c5 C" L6 Y2 h+ j$ W- r! h' D$ ?4.3 Residue gain in two-stepA/Dconverters . . . . . . . . . . . . . . 69" w; V4 f6 d( C
4.3.1 Single-residue signal processing . . . . . . . . . . . . . . 693 X9 \: t8 t" h$ W) r
4.3.2 Dual-residue signal processing . . . . . . . . . . . . . . . 71; D& [6 M! X5 @! P
4.3.3 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . 75
, @3 y4 \9 m& I8 ]9 y/ d, V; z4.4 Offset calibration . . . . . . . . . . . . . . . . . . . . . . . . . . 750 U# G; G: @+ g& J
4.4.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 75* _# y  k" f( Y5 a
4.4.2 Calibration overview . . . . . . . . . . . . . . . . . . . . 752 ?- [! H. w8 d7 g, v' C
4.4.3 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . 82
5 c- q7 q9 x* ~& w1 t4.5 Mixed-signal chopping and calibration . . . . . . . . . . . . . . . 83
$ |( r- {, O1 D( t5 d, ]/ Q4.5.1 Residue amplifier offset chopping . . . . . . . . . . . . . 83
+ I2 H$ ~' Y' x# l4.5.2 Offset extraction fromdigital output . . . . . . . . . . . . 845 P. A! f: n( \8 q; E4 C* g
4.5.3 Pseudo random chopping . . . . . . . . . . . . . . . . . . 88
9 ], R$ B; Q! Z: Y4.5.4 Offset extraction and analog compensation . . . . . . . . 91* b3 c5 r/ C- _$ x5 [9 G
4.5.5 Offset extraction in a dual-residue two-step converter . . . 93
! r9 q5 d1 Q- p2 K: P/ i+ W+ E. j4.5.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . 102+ Y# i6 J' h+ l4 v6 [( v
5 A 10-bit two-step ADC with analog online calibration 103
  W( i# M" ^. D, _8 @9 T5.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103' @' v% t9 ?+ T; x: H
5.2
; R% V9 @+ l* l5.2.1 Coarse quantizer accuracy . . . . . . . . . . . . . . . . . 106
& ?  V. @1 ?6 p% M5.2.2 D/A converter and subtractor accuracy . . . . . . . . . . . 1074 X8 i" T, a" x/ x8 `  A
5.2.3 Coarse andfineA/Dconverter references . . . . . . . . . 108! S1 @: ?# {4 [
5.2.4 Amplifier gain and offset accuracy . . . . . . . . . . . . . 109( L* c; B: _8 r9 \9 }
5.3 Circuit design . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110- E  V! y, l# s
5.3.1 Track-and-hold circuit . . . . . . . . . . . . . . . . . . . 111
; [6 T0 J: Z# X' v5.3.2 CoarseA/D,D/Aconverter and subtractor . . . . . . . . . 111
* m1 K: F' I, ?! N5.3.3 Coarse ladder requirements . . . . . . . . . . . . . . . . . 112
/ h, L( x" v+ c3 Q5.3.4 Offset compensated residue amplifier . . . . . . . . . . . 113! c5 @8 _0 k4 _. [# |/ q6 Z* T
5.3.5 FineA/Dconverter . . . . . . . . . . . . . . . . . . . . . 114
! o9 x* Q# M( a9 m7 w2 N& R5.3.6 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 1169 R& k, K- w6 x5 M- Q( ?
viii
$ S" R1 l2 L8 y  d! G$ J( STwo-Steparchitecture . . . . . . . . . . . . . . . . . . . . . . . 105% J. V- F. e1 R" W0 }! N
Table of contents$ r5 ^3 G. l0 v) b# \/ A6 T
5.4 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . 117
. @0 h9 D* w. h5.5 Discussion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1213 K* z! U; s+ ]. k% D! l8 M" C
5.6 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122
4 P! ~$ |$ h# p! t$ \6 J6 A 12-bit two-step ADC with mixed-signal chopping and calibration 123
4 ^( K: Q9 _0 W/ P" A" p$ o$ T7 A low-power 16-bit three-step ADC for imaging applications 149
發表於 2010-4-16 02:27:47 | 顯示全部樓層
感謝分享
8 y5 P2 i' X/ F先下載來看看
7 _9 O/ v( i- G$ ithank you very much~
發表於 2011-9-19 08:06:58 | 顯示全部樓層
good material !!!
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