請教modelsim無法跑出波形

pcitfor · 發表於 2008-2-11 08:53:38

小弟寫了一個mux 4 to 1的verilog code用xilinx + modelsim SE 6.1f
跑模擬
可是跑出了的波形都是high Z跟unknown
也就是訊號資料檔沒灌進去
想請問各位大大
我該怎麼修改這個錯誤

=======================以下是verilog module code======================
module mux4_to_1(out, i0, i1, i2, i3, s1, s0);
output out;
input i0, i1, i2, i3;
input s1, s0;
//out declared as register
reg out;

//recompute the signal out if any input signal changes.
//All input signals theat cause a recomputation of out to occur must go into the always@(...)
always@(s1 or s0 or i0 or i1 or i2 or i3)
begin
case({s1, s0})
2'b00: out=i0;
2'b01: out=i1;
2'b10: out=i2;
2'b11: out=i3;
default: out=1'bx;
endcase
end

endmodule
=======================以下是test bench==========================
module stimulus;

// Inputs
reg I0,I1,I2,I3;
reg S1,S0;
// Outputs
wire OUT;

// Instantiate the Unit Under Test (UUT)
mux4_to_1 uut (
.out(OUT),
.i0(I0),
.i1(I1),
.i2(I2),
.i3(I3),
.s1(S1),
.s0(S0)
);

initial begin
// Initialize Inputs
I0 = 1;
I1 = 0;
I2 = 1;
I3 = 0;

#100 $display("I0=%b, I1=%b, I2=%b, I3=%b\n", I0, I1, I2, I3);
//Choose IN0
S1 = 0;S0 = 0;
#100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
//Choose I1
S1 = 0;S0 = 1;
#100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
//Choose I2
S1 = 1;S0 = 0;
#100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
//Choose I3
S1 = 1;S0 = 1;
#100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);

end

endmodule

pcitfor · 發表於 2008-2-11 10:56:21

可以請教一下要怎麼加嗎
是在always@(s1 or s0 or i0 or i1 or i2 or i3 or clk)
這樣嗎(感覺怪怪的)

pcitfor · 發表於 2008-2-11 11:34:41

謝謝大大的提示
小弟試著在stimulus加上clock
修改方式如下
就完成了
不過不知道有沒有瑕疵
還請大家多多指教!!謝謝

`timescale 1ns / 1ps

module stimulus;

      // Inputs
      reg I0,I1,I2,I3;
      reg S1,S0,CLK;
      // Outputs
      wire OUT;

      // Instantiate the Unit Under Test (UUT)
      mux4_to_1 uut (
            .out(OUT),
            .i0(I0),
            .i1(I1),
            .i2(I2),
            .i3(I3),
            .s1(S1),
            .s0(S0),
            .clk(CLK)
      );

            initial begin
            CLK = 1'b0;
            forever #10 CLK=~CLK;
            end
      initial begin
            // Initialize Inputs
            I0 = 1;
            I1 = 0;
            I2 = 1;
            I3 = 0

            #100 $display("I0=%b, I1=%b, I2=%b, I3=%b\n", I0, I1, I2, I3);
            //Choose IN0
            S1 = 0;S0 = 0;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I1
            S1 = 0;S0 = 1;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I2
            S1 = 1;S0 = 0;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I3
            S1 = 1;S0 = 1;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);


      end

endmodule

pcitfor · 發表於 2008-2-11 12:14:47

你的意思是這樣嗎
`timescale 1ns / 1ps
module stimulus;

      // Inputs
      reg I0,I1,I2,I3;
      reg S1,S0;
      // Outputs
      wire OUT;

      // Instantiate the Unit Under Test (UUT)
      mux4_to_1 uut (
            .out(OUT),
            .i0(I0),
            .i1(I1),
            .i2(I2),
            .i3(I3),
            .s1(S1),
            .s0(S0)

      );

      initial begin
            // Initialize Inputs
            I0 = 1;
            I1 = 0;
            I2 = 1;
            I3 = 0

            #100 $display("I0=%b, I1=%b, I2=%b, I3=%b\n", I0, I1, I2, I3);
            //Choose IN0
            S1 = 0;S0 = 0;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I1
            S1 = 0;S0 = 1;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I2
            S1 = 1;S0 = 0;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);
            //Choose I3
            S1 = 1;S0 = 1;
            #100 $display("S1=%b, S0=%b, OUT=%b\n", S1, S0, OUT);


      end

endmodule

===================================================
只有加`timescale 1ns / 1ps
這樣好像還是跑不出來
我剛試跑過
跟原先的是一樣high Z
應該是要把clock灌入input data
使之並行輸出
這樣宣告的input data 才會產生
(PS:我是用Xilinx ISE8.1i + modelsim SE 6.1f
剛初學很多還不是很懂以後還要多多指教)

[ 本帖最後由 pcitfor 於 2008-2-11 12:16 PM 編輯 ]

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[問題求助] 請教modelsim無法跑出波形

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