Which verification elements does your team use on your current design project?

ritaliu0604

Staff Hardware Based Design and Verification Engineering Lead

( P9 U8 o) e& k9 k0 [公      司：One world top EDA company
工作地点：上海

Position Description:  
1. The Staff Hardware Verification Engineering Lead will be in charge of a team of field engineers to support advanced hardware based verification flow integration engagements with Cadence customers and provide easy-to-adopt packages and workshops to xx  field application engineers and customers alike.

2. He/she will focus on the technical aspects of the following hardware verification solutions for customer engagements as well as creating demos/workshops to train field AE and customers:
(1) xx  Palladium HW Acceleration Platforms
(2) xx Acceleratable Verification IP portfolio
(3) CVA product integration with other xx products such as Incisive Simulation and RTL Compiler for power analysis
(4) HW/SW Co-verification solutions for SoC designs

ritaliu0604

Position Requirements:  
1. Experience:  
2 r* H, G# Z% U! G$ i* B- Minimum experience required: 10 years  
. @2 f7 u2 z, p2 u- s+ v- k- Expertise in RTL top-down design and verification methodology automation are required. This includes full hands on knowledge of writing and debugging Verilog, VHDL and SystemVerilog based D&V environments.
- We would also like the candidate to have good knowledge of SoC design principles, embedded software development and HW/SW codesign and coverification.
  A- w. {' L0 c* s0 C# y- Knowledge of UNIX, C/C++, other scripting programming languages ( Perl, TCL…) is highly desired
- Strong verbal and written communication skills in English are required  
- HW acceleration or In-Circuit Emulation or FPGA prototyping experience is a must
# D) M, Y& L4 ]" Q- Hardware verification, including knowledge of HDL simulators and debugging simulations
- Hands on experience with using design and verification languages like SystemC, SystemVerilog (IEEE 1800) and VHDL is a must.
- Knowledge of embedded systems and software development for SoCs is a plus
2 W: O! e) D1 A9 I# t2. Education:  
( I9 ~8 [. B; U3 CIdeally the person should possess the BS/BE level of understanding of CS or EE Engineering concepts  
- Minimum Education Required: education level of BS with 10+ years experience (or MS with 7+ or more years experience).
3. Travel of 30% of the time should be expected.