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RFIC工程師門檻?要當RFIC Designer的三大條件?

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發表於 2013-11-29 13:40:13 | 顯示全部樓層
Senior Design Manager$ M5 m- E. C1 q7 q1 S3 p
公      司:A famous IC company- @$ o" ~4 W  a3 C6 X
工作地点:上海. H. o2 ?0 B4 }3 Q8 O. V) n

, g- u, T( S6 @5 t5 `' `  ~Duties  1 r+ _% J& Y) C0 ~- v
        Analog IC circuit design, simulation and verification  
! }- @- ^+ i$ q9 `. g6 c0 ]        Design analog products and blocks such as high current, high voltage DC-DC etc.  * U" ^+ C( k! _/ A; a
        Design of the switching power IC, Charger, Load switch etc.  9 h2 l) [/ p0 H1 U( o
        Evaluation, simulation and analysis of power architectures and circuit topologies  
. H8 o( J' q4 t, ~1 y0 @' ^7 _        Mixed-signal circuit design, verification  4 [. u/ Z( e4 n( o% n9 b
        IC layout including floor planning, DRC, LVS, and LPE  * O/ U; Z$ _1 f
        Work with application and testing engineers to define optimal characterization and testing solution  3 e! C2 Q9 |+ i# Y0 }' U* r/ c& Q: n
        Work with product definers and product engineers in full product development flow  
) ]2 Q) G0 ]' b        Work with product line to coordinate/lead projects, accurately scopes out length and difficulty of tasks and projects. Establishing clear directions and set stretching objectives + F  c3 v& `2 r4 ^: @
        Building and creates strong morale and spirit in his/her team." _; j* {/ q: M: g7 {( H0 p
/ i# A$ U5 w5 M4 d0 l4 L2 w
Requirements  / D- j/ m: _$ \, p5 r" A* M8 j* X
        Minimum 10 years direct DC-DC IC design experience, with MSEE or above degree  
: l: Y( }2 E! q3 _% _) e" Y        At least 5 years  leadership experience in leading a mid-sized team  $ ?0 [; `( C, a  m, |. R
        Strong knowledge in analog CMOS and Bipolar IC design  ' m# o/ R' s  n' }1 H8 [
        Working direct experience with switching power supplies, DC-DC converters, Battery charger,  and their various topologies  
! O+ B6 R6 u( f) c4 O- v        Theoretical understanding of the power electronics, switching power supply topologies  
" G6 Q1 j( I/ P9 z* [: Q/ s        Prior experience with power management related IC design a strong plus  . z6 F" ^( t+ E
        Knowledge in analog IC layout  
( |( C5 l# ]6 J- n7 m# E        Matlab/Simulink/VerilogA or other behavioral simulation expertise a plus  5 R# r9 h5 S. p
        Result driven and can effectively dealing with ambiguity  
( m2 W6 W' N. s& p% |" t        Excellent written/oral communication and presentation skills.   
9 n: j$ w  y, o( Y! @        Understanding others, picks up the sense of the group in terms of positions, intentions, and needs, what they value and how to motivate the group.
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