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積體電路佈局工程師核心課程養成班的必要核心課程?

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發表於 2012-2-16 17:34:59 | 顯示全部樓層
招聘公司:one famous IC company
6 C! d1 b+ T' Y1 C招聘岗位:Sr. Layout Engineer: N9 |" N4 p3 C3 Z4 f, r8 N3 p1 y/ s
工作地点:Shanghai# ?. F. s' W1 L

' s6 P( `4 @$ m$ z# _岗位描述:+ k& w6 P, [6 u2 f4 p
Job Requirements: -Work with circuit designers to build physical design floor-plan; -Complete the physical layout design with the constraints of circuit design requirements; -Verify the physical layout design to meet both circuit design requirements and process requirements; -Use the advanced technologies to improve layout design quality and efficiency. " T/ H+ \  n, s0 V: E# F0 F+ T+ g
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职位要求:
4 p6 ^0 x, u- I( y& |$ kQualifications: -College degree (or above) in Electrical Engineering or other related engineering field; -At least 6 years experience in layout design field with rich tapeout experience; -Good understanding of basic electronic principles dealing with circuit and layout design; -Familiar with IC layout methodologies, flows and CAD tools such as Cadence virtuoso layout, Caliber physical verification; -Prefer experienced in PLL and IO design -Patient, A good team player, Good communication skills; -Can communicate with both written and spoken English.
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