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[問題求助] 偶想請教如何設計出與VDD無關的bias circuit for fold cascode OPA

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發表於 2010-1-15 21:10:09 | 顯示全部樓層
Use self-biasing. You can find the circuit in usual analog textbook.
If the bias current is not proportional to  VDD, the gain can be keep constant.
In ur circuit (on the left hand side), since Vref is constant and then the PMOS would change the resistance with VDD, the biasing current is proportional  to VDD.
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