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Analog / Mixed Signal Examples
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Behavioral Models of ADCs, v+ s9 i2 m ~0 ~: W, s
\ams\sampling\; sampling_101;: w" T- G8 \% X% ]; ~( b' u
Sigma-Delta ADC 1st order modulator $ cd \ams\adc\; dspsdadc2;
& Z8 m: U# \9 I6 v Sigma-Delta ADC 2nd order modulator $ cd \ams\adc\; dspsdadc3;
- p7 N* i0 |: i0 E: m+ w Sigma-Delta ADC 2nd order modulator discrete time (switched capacitor prototype) $ cd \ams\adc\; dspsdadc4;
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Behavioral RF
8 ?# w; d/ k/ Y4 L. B4 Y Measurement of Lowpass Filter Freq Response $ cd feed_fwd_2;
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PLLs 0 y- I7 P6 p4 L2 i8 k4 }; k/ y
VCO with phase noise $ cd
9 f% \3 G& E* [7 h! O2 _ Pll with freq domain instruments $ cd \ams\pll; " @' E8 U p' I
Pll fractional with analog compensation $ cd \ams\pll;
! j) _7 L# D {' N$ L Pll fractional with digital compensation $ cd \ams\pll; ( c( ^" g' {- ]
Pll optimization (Nonlinear Control Design) $ cd \ams\pll; ) ~4 ?, W9 V) A: E: e# r; L' F
Carrier and Symbol Timing Recovery (NCO->ADC) $ cd \ams\pll; carrier_timing;
5 P3 {0 Y5 [# g8 ?2 F3 p( ? Carrier and Symbol Timing Recovery (Fractional Delay) $ cd \ams\pll; timing_recovery_1; |
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