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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement
( o5 q, d5 e7 v1 j. Ewas to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the
0 Q: B1 S: Q" p. @# g. ~combinational signal in the sensitivity list, so do we!". Q2 T/ l3 Z2 @8 f
Example 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational" I& t* R4 F8 B* N! R
sensitivity lists for the combinational always block of any of the three always block fsm1 coding styles.
& ? I% g H8 T0 I+ ?/ V) K$ I! T; H4 j B
always @(state or go or ws)
! y w) j6 z: j7 Y& ~3 Ebegin" C: \- n% g0 ?1 s& S4 i- f
...
, W7 E+ B2 _3 n- i; y) _" S6 Hend
( m8 o. Q& M& q//Example 1
( E- H! b1 N- j, c+ D5 @" A, |& P- Y8 ]7 K0 K+ j- p
4 ?* h U+ L. f& Kalways @*. M! K$ d7 l" s* z" c
begin
: J* k Y% B6 |) N8 a...
. J4 s1 i. T+ O( bend
8 r3 k" u& {0 y* ?; `//Example 2$ P% F' [( ~% J1 P. w. i" O# X
; r- \+ F4 s0 t! a
The @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without
; {6 T, g; X8 f2 `parentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open( S- R# z9 F8 `' w: {( r4 t& _
a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this
* b, \% @) x' j2 l) Ccombinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not& c; ? O( E' y* I4 b1 q; v
have to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage
' ~" L+ a+ b" d+ nof the combinational sensitivity list to the @* form.# D( k) W" s, n/ d) K% N8 N$ m
always @*
% V. x) p' H: t H0 V9 W: Ualways @ *
& [, J! F# u! r) Valways @(*)
; }' r# X& Q- k8 S8 I* p0 zalways @ ( * )
$ ]2 d1 T+ b. i: N/ O//Example 3 |
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