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請問先進們,一個Layout電容的問題,由於小弟在畫SiG.35製程的電容時(此電容是用內建叫出來的model為"C3T_MIMW"),在跑LVS確無法驗證,出現了以下幾句文字: 9 s$ ]0 h3 m- Z% @! C7 k7 W; M
Error:No matching ".SUBCKT " statement for "C3T_MIMW" at line 26 in file "netlist"
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ERROR:source could not be read.4 D w! M2 j# _
***calibre finished with Exit code:4***
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這是netlist檔的spice:
2 V c6 c* G, o3 K3 j N .SUBCKT c1p a b0 \( m5 l7 Q2 j' t" H' i6 V
*.PININFO a:I b:I
- B8 H. H' \$ R1 \, x XC1 b a gnd! c3t_mimw c=60.07p m=10
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: @6 k" i# i& [: c 麻請有了解此問題的先進們,能回答一下!! 謝謝您們 |
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