The wholechip floorplan is very important before you start the layout. : w; |# |4 U. {/ d4 z- a/ V iThen the position of output pin are fixed for each sub block,and the line drawing will be smooth.7 y+ }' W- {% S
Finally,the drc & lvs could be so easy to do .8 b( ` s' K) |0 A+ C9 p
But the floorplan must be verified by designer.The thing of re-layout almost have not be happened.