DFT 使用工具調查

chip123

為瞭解大家都使用那家公司的工具來做DFT??
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聽說有人可能用 MBIST 和 BSD？還是比較流行用dc ，但 dc 只是插入scan chain，那 test pattern 用什麼工具呢?TetraMax可以產生test pattern？還是你可能是 Synopsys 的 DFTC、或者 CadenceTetraMAX 兩個都用？

hsd123

DFT 包含很廣, 你指的應該是一般常用的 scan chain insertion 及 atpg tool 產品吧?
( K6 c" @2 b0 Y5 r) W, S! ^7 O我們公司現在用的還是國產的老字號 Syntest tool(TurboScan).

9 e% d6 e( ?! R2 v/ X7 j* S% ZSynopsys : DFTCompiler + TetraMAX
1 Y0 D% b2 x, b' ~+ [Mentor : DFT Advisor + FastScan
# g+ ~% {! H2 i2 L+ x; ^# |Cadence : ?
Syntest : TurboScan(VirtualScan)
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* k4 M6 x5 F2 \& @: Q# [3 Q1 G1 a3 h另外 MBIST & BSD 應該不是 tool,
5 |' I9 \: U3 ]& k+ xMBIST : Memory BIST
BSD : Boundry Scan

phoenixson

I am a new guy in EDA design area. I want to implement the bsd scan for my design by bsd compiler of synopsys,but I
encountered some difficulty, It made me boring.who can explain the bsd flow in detail.

masonchung

What's the equivalent gate-counts of your design?

yytseng

Cadence ==> RTL Compiler + Encounter Test (acquired from IBM)
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* z3 M7 s3 w* V& [: Rspecial capability:
Synopsys : support multiple clock domain, phase shift test clock
' J& i. d. ]# E; N8 DMentor   : highest compression
9 [4 V0 k0 n' s+ R- g3 hCadence  : low power handling, pattern fault, diagnostics
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. @; Z3 z* S9 F1 A6 v9 }6 _Common new features:
# c6 z1 ], E  F0 O6 U& S$ M* DCompression, at-speed ATPG, core wrapper, BIST, IEEE1149.1
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In my image, Syntest had became a service-oriented company.

wtony

我公司也在使用Syntest tool(TurboScan) +1
" }$ V/ S/ g! Y5 e$ nvirtual scan, ac scan 都有用

lee100

Below is my company DFT releated EDA tools for you reference:
1. dft insertion, Synopsys-dft compiler,
0 O' V2 {( q& h  x4 q, v2. dft compression, Synopsys-dftMax,
% Z6 j( ?  B: w2 u2 s: R5 t3. mbist, Mentor-mbistarchitect,
) S6 g4 f" N0 W4 H% m% `! ~9 f4. atpg, Synopsys-TetraMax
: w+ h  I5 R. z( t- ]5. bsd, Synopsys-dftc