8:30 | 報到 |
9:00 | Session 1: SmartFusion Family and Design flow Introduction Rajiv Nema, Sr. Product Marketing Manager, Mixed-Signal FPGAs |
- Overview 0 ^3 @5 G9 a7 V; N j
- Design Flows
7 d! m. p/ O: F d) | l9 ^- Demo: Design Flow Demo and Tool Bring Up 0 M: |* K( \% M, {) e+ W4 X8 v
- Embedded Design Flow |
10:45 | 休息 |
11:00 | Session 2: Leading 32bits MCU Development Tool – KEIL MDK Leon Chen, FAE, ARM Taiwan |
11:45 | Session 3: Designing with SmartFusion I Kevin Wen, Sr. FAE & Processor Specialist |
- Microcontroller Subsystem (MSS)! b4 a' Q, ?8 R _7 _ h; t1 d
- I/O Multiplexing |
12:30 | 午餐 |
1:30 | Session 3: Designing with SmartFusion II Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: running Sample Designs |
2:00 | Session 4: Analog Design Felix Chen, FAE |
- Analog Compute Engine (ACE)9 j- I4 m4 P6 ?+ q
- Demo: Reading POT values and displaying on HyperTerminal |
3:30 | 休息 |
3:35 | Session 5: FPGA Design Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: Adding peripherals into the FPGA fabric |
4:30 | 會程結束 |