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[企業求才] 國際知名大廠高薪(最高80萬人民幣年薪)急徵各方高手(工作地點:上海、北京、廈門)

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1#
發表於 2008-3-17 12:07:41 | 只看該作者 回帖獎勵 |正序瀏覽 |閱讀模式
包括:8 _! e. R+ ?" \' p  L6 `

. G1 [7 {/ H5 F  C2 b1)Technical Consultant(特殊职位)廈門
! e- e6 _0 e8 I4 @! v% \2)  Application Engineer – HSSP(特殊职位)上海$ p; e; A4 ?" h1 ^/ K* |
3)R&D Director Beijing
( Q, P# I1 G# |: V4)  RFIC Design Engineer 上海1 W& v* c- [+ R7 B; A
5)  RF Applications Engineer 上海0 |0 A0 ]& \4 V/ K
6)  Library设计工程师  上海
  ^7 S5 j) }2 ?) q2 P) _2 Q5 q0 q2 ?7)  器件模型资深/主管工程师 上海
: W, R$ {+ g: M% B8)  Senior Software Engineer (Network Protocol Software) (Switch/network card)上海
0 H/ o9 W6 o$ @7 q6 v) q9)  Software Engineer (Network Device Driver Software)上海
4 A; ]9 \* f& l% J+ Z, C10) Communications Systems Test Engineer(Bluetooth) 上海
, J+ z1 S& j) _  g1 ~11) Manager, Market Development BEIJING
0 ]# m5 o+ }5 u' p* t2 b12) Bluetooth Application Engineer 上海

. j: n2 z6 ?( K. ?. ~# |' T13) Senior Level Layout Engineer 上海# n8 i# h+ D6 x7 [! W
14) Senior ASIC Verification Engineer 上海
3 S. N* a7 m# k, o5 @/ |1 i8 _15) Test Automation Engineer 上海

5 }0 R2 R. J- F9 O! v" [& J
# J4 c' i4 W* W9 R/ O) K意者請以 resume 與 chip123@chip123.com.tw  聯絡!
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30#
 樓主| 發表於 2010-2-1 15:10:50 | 只看該作者

System integration engineer - product r&d system integration

A famous company 地点 wuxi
" K" I; {  ^3 Q5 X# C" r! _+ Z职位描述 岗位职责:
2 O. s: O' w% x( B) k" w  ]% X# Y! u0 o
1. 调研相关产品、技术,协助相关技术的引进。" Z7 s: p0 L! R, t% \  O
2. 负责现场组织管理,代表单位与业主、分包方沟通、协调管理;
* E/ e  d$ K5 w3. 组织项目系统集成方案的实施工作,竣工文件编写等工作。
0 m( d7 K) S8 o9 I$ s/ X6 y4. 硬件集成方案设计与安装、系统设备调测
. ?$ P% W2 z5 [5. 完成上级主管交办的其它任务
& T/ [4 j/ }' I3 a+ j4 Q% j+ ]5 V
: U- o/ L2 \. G/ Y职位要求 任职资格:
( |: H' F# Y1 A5 r7 l
; k% i4 u' C; S+ |1. 本科以上学历,通信工程、电子信息与电气工程、自动化控制等专业毕业% y6 C/ ]! y7 S# l( d+ A8 ]
2. 具备2年或以上系统集成领域项目经验,有独立组织实施项目管理的经历。4 S& d5 C9 L, D
3. 有安防监控系统设计及施工经验,掌握建筑综合布线系统知识。
( e. x1 N2 E2 f( w. d4. 熟悉IT领域、自动控制专业知识,了解视频、电源、综合布线等相关专业知识。了解不同行业的应用需求,掌握代表性产品的使用案例、性能,并能无缝集成到特定的应用环境中。
" @5 G# }; L1 a! B" f) H5. 有系统集成项目管理工程师资格证、信息系统项目管理师资格证、计算机信息系统集成项目经理资质优先。
+ M" _4 }7 c; \' @; U2 W# A6. 熟练使用CAD, Microsoft office Project。熟悉项目管理全过程。0 n- Y' p+ c# K: c6 R
7. 性格开朗,工作积极主动、认真负责,有较强的沟通能力。有良好的团队意识及服务意识,优秀的口头、书面表达能力。
29#
 樓主| 發表於 2009-12-25 11:25:28 | 只看該作者
公司简介
0 h* z! n3 _" V6 P9 a( h. t% jXX is a place where people excel at solving real world problems and challenges in unique ways. We are a company where new ideas germinate and take root when passionate, intelligent, and highly inspired people work together. % Z3 u: E* P! z$ G2 ?
8 F( ], [3 K5 s- `8 G5 T' b4 K( |
At XX we provide an environment for experimentation, innovation and collaboration. We foster an entrepreneurial approach that is forward-looking, nimble and unconventional – and we pride ourselves on thinking outside the box. Our team is unflappable in the face of audacious goals and challenges. Founded in Sept. 2003 by 8 veterans of the semiconductor industry, XX was bootstrapped utilizing revenues generated through consulting projects. Subsequently, in Nov. 2004, XX secured Series-A venture financing upon the completion of its first prototype silicon television tuner in CMOS technology.8 E1 B/ [5 ^5 v8 W% u

  {! ~/ `4 a1 D6 f& c+ fAt the very inception, XX recognized the benefits of CMOS IC technology over exotic SiGe and GaAs technology for broadband RF ICs, in a contradiction of conventional wisdom. XX developed the first digital CMOS television tuner in 2005, and began shipping the first of its CMOS tuners in October, 2006. In early 2007, XX marked another major milestone when started shipping the world’s smallest silicon TV tuner. By continuously improving and excelling in our CMOS-based RF and mixed signal IC processing techniques, XX endeavors to stay at the forefront of communications IC technology. As a result, we deliver IC products that consume the lowest power, have the smallest size and superior performance that results in highly differentiated customer platform solutions. . I& A: z1 E' c9 L& p

& S9 R  _5 M1 E+ fXX is the first company to deliver the triumvirate of best performance, lowest power and smallest size, in its TV tuner solutions enabling television on devices ranging from mobile phones and computers to set-top boxes and automobiles. . XX - We envision, empower and excel in all that we do!
28#
 樓主| 發表於 2009-12-25 11:25:16 | 只看該作者

A famous IC company looking for ASIC Design Engineer

职位描述, u6 c8 N/ G# |* Z7 `
Should have good understanding of the whole ASIC design flow,i.e, logic design, rtl coding, verification, synthesis, timing and backend. 3 h8 V' q  t2 ?# `
Should have good background in communication theory and embedded systems.
( Q  E3 M. r  U% D0 |Should have taped out at least 2 commercial chips in the past. 8 b3 }# G" F- V! l% r) O+ s
Should be proficient in the lab in terms of FPGA emulation and IC testing.
6 L# s. [) b! P, |( ~2 [; f8 L8 ~Should be able to work with marketing team and system team to define the proper product spec.
) N# f7 y# Q0 ZA self starter, motivated, hardworking and a good leader.) e: X1 S1 E5 S) P
& B& f- X5 A8 D
职位要求, |/ |* f3 j' x
BSEE required, MSEE prefered. 3-5 years industrial experience.
1 T: Y- v0 o( ]/ Q0 C& r5 ]: y2 f9 j: a; S9 Z4 z! C& A; u
地点 shanghai
27#
 樓主| 發表於 2009-12-25 11:22:14 | 只看該作者

A famous IC company looking for DFT engineer

Job Duties:
6 \# x: _5 j5 m! @7 Q5 h: k! `+ [( t
1.Develop, simulate, and implement DFT design for the new chips and meet the tapeout sehedule. % {  @, D6 c" }7 `& x2 I. F: s
2.Develop the high coverage and cost effecive test patterns for the production test.
0 a+ W% x5 U2 C. s' \( h2 z3.Evaluate and establish the advanced DFT tools and flow.( A4 ]$ _7 ^* ^# Q
. Q9 p3 b4 V* C, `
Qualifications: (Education, Experience, etc) : n( R( m% f; }- r
7 q: b" O! v/ W2 u
1.BSEE required and MSEE preferred.
* ~% P% t/ d# _8 k" R. j2.Minimum 2-3 years of DFT or related design experience. ; b1 \8 C+ @9 k& s
3.Profieient in verilog and ATPG tools.
- q# o, @2 h2 y/ j4.capable of independent study, project management and bring in new methodology.
1 Q$ `7 J( J9 }# `1 y  Z: a0 ^5.Strong commiment to schedule and work quality.
0 H$ x; C, g8 ?9 S9 v4 B6.Good team work and communication.) x+ P1 J* i, ?* R

- d/ [# X6 t3 x, n8 p/ v地点 Shanghai
26#
 樓主| 發表於 2009-12-25 11:20:18 | 只看該作者

one famous IC company looking for Sr. ASIC Digital Design Engineer

Digital design on deep sub-micron technologies for high speed complicated digital and mix signal ASIC products
4 `3 h  ^; P* X  X7 xDevelop micro architecture specification based on chip level design specification
% o/ V) Y  H$ S( b: Z4 a; bRTL and verification methodologies and platform development
, c' |. ]0 z; @# x2 ODFT, synthesis and timing closure0 b" s5 B( g, F6 I
Chip level bring up, validation and debug+ d  M$ `( s3 m* K0 \9 D6 u2 I
2 X$ [, b; J7 X
职位要求$ y% T1 u- U( t, c

7 Z1 \- s5 f- P5 R0 t: V  \( pMSEE with 5+ years of experience on digital ASIC design in complicated and mix signal deep sub-micron environment
  S/ ~7 i0 p/ T: g" lProficiency in Verilog and its simulation environment8 p( G; {2 F1 k' S" V( E
Proficiency in RTL synthesis, DFT and timing verification with deep sub-micron process0 f) j2 j; s) K1 b
Experience with PCIE, USB2.0/USB3.0, SATA, etc. is a big plus; U# Z  Q# E) [# K1 v% h
Experience on high speed/low power design is preferred
0 F1 I  X9 Q: [! T4 ^Experience with chip integration flow for high speed mix signal ASIC is a plus
0 m: R2 o3 o: ]/ ?$ F: R! q8 VGood written and spoken English is a must
* T# m" x% T7 t& g. |Self-motivated and a strong team player# Q1 N0 [+ m5 U8 T$ L# a# P

1 g; u& K( Q' W+ L" C" \! {地点 Shanghai
25#
 樓主| 發表於 2008-12-3 14:32:17 | 只看該作者

美資公司爭聘CPU Module Project Manager年薪至少30萬人民幣以上

JOB RESPONSIBILITIES* x0 c& ^# S4 X1 d( N
* J& t( X/ t9 Z* _( b7 Z+ X
1.      To be responsible of overall module business operation in the business unit.
: n* S" v% z2 n, A6 h6 A  r2.      To establish the complete flow and necessary systems of module product creation including product spec., BOM analysis, product development, contracted manufacturing, quality assurance and logistics management.
1 b+ R( q9 ?  v3.      To recruit, develop and lead a team with functions of product management, supply-chain management, planning and QA.6 i# i/ z3 ~/ D* |+ V# g: D
4.      To work with design and solution centers for new module product development.
( r9 _" r& @' h1 \6 p9 _: t% |5.      To work with business development team for customer requirement and product rollout.
% b' B. g1 F# c# r' `6.      To work with contracted manufacturers for module product manufacturing and logistics management.  `; X: D7 b, U0 }) T4 j& T
7.      To drive cost improvement roadmap for module products by identifying and engaging with proper suppliers.! h; C4 ]* u2 a% A) O3 q
  
1 \: O( y/ K% n5 Q- U! pREQUIREMENT4 P% c# N7 v% \( m$ o4 T8 }% |

7 E1 l% k% Z, x4 a2 M# q1.      12~15 years of working experience.0 ], q. I, ^' X8 c3 b5 B
2.      Direct experience of handling Trackpad Module project in house and with contracted manufacturers.  k. x- o8 k6 a
3.      Capable of coordinating a module product creation including product definition, development, manufacturing, QA and logistics. # S7 s# B( j2 n
4.      Knowledge and direct experience of module supply-chain management.
2 C: y! H! @  l/ j" N5.       Good communication skill and command in English.
$ O6 {  _# t' W7 `& [6.      Mature and can work independently. Capable of driving results proactively.
3 t# S1 j5 T0 v7.      Experience and good leadership of recruiting and managing a team of work force., n3 [) [. y' i7 y
8.      BSEE/MSEE or related decree.
24#
 樓主| 發表於 2008-4-28 17:22:41 | 只看該作者
Sales and Marketing Director(上海)(30K左右,13月薪,英文好) : p- o2 `! A; |* T

  A& a! }6 @3 S+ v2 x0 H2 i要求:男性
8 u, s* a. A/ z0 I, O8 U! L' h10年电子产品相关工作经验 3 [, i. V5 h8 U) t0 Y
在华东电子产品领域工作至少3-5年 ( o$ e$ X  J2 O& w5 {  X4 o- d3 Q" b
具备公司高层管理经验至少3年 2 Z$ R. O' d9 [3 [' N2 s: d9 D
具备DISTY经验
, |" x  F0 E% F9 ^% ~% E  a拥有新的产品线和新的客户资源,具备良好的客户关系
( E3 N  i9 G2 ~5 \. T在mobile consumer electronics领域具备良好的经验及专业知识
" z8 I" M, k7 m9 \, i/ {+ |要求香港人,台湾人或者新加坡人,外国人也可.% U# Q6 R) @# Q* X
负责 plexus-n.asia的market director的工作,包括上海,深圳,台湾,北京,厦门…
23#
 樓主| 發表於 2008-4-17 12:40:39 | 只看該作者
SEA Resident Quality Engineer
6 c5 `1 @! u+ h$ K! YLocation: Shanghai4 J- }8 [. C5 Z' m3 O/ c3 {
某顶级半导体公司(前15位)NO.16-某全球前十五大半导体公司,美资,全球最著名的高精度模拟电路制造商之一。模拟IC产品的最强者之一。运用模拟IC做开发的电子工程师的圣殿之一。
3 L3 A- w4 [* nJob Duties:
" K( P, e9 c7 y" T) L2 G Provide strong and effective quality systems support to manufacturing activities at SEA subcontractors, focusing on China. Prevent problems  through assuring robust systems, consistent compliance, and proactive problem solving. Overall objective is to enhance and protect xx's image with customers.
$ N, V& o1 O+ Q2 V' l
% V/ r) o2 h7 K+ x/ r 1. Ensure compliance to xx policies, procedures and specifications including xx Supplier Management Policy (ADI0007), procedures  (SOP's), General Procurement Specification (GPS) and other related xx specifications.
- h/ a: ~2 n! }/ A8 _% O: I& [ 2. Ensure compliance to subcontractor internal controls are adequate to produce product that meets or exceeds ADI requirements.
+ A" O2 i9 p, b/ M. i 3. Manage Quality Issues: Lead / participate in CAR/SO activities and MRB's. Ensure all aspects of the 8D report are addressed including containment/root cause/corrective action/preventive action. Verify corrective action effectiveness over time. " |* u# n5 f. O/ e2 b  [
4. Perform audits and monitor subcontractor facilities and processes to verify compliance to agreed quality systems, specifications, control procedures, and previously implemented corrective actions. 9 L, {7 p2 t) z3 |- F
5. Participate in xx and subcontractor TQM teams. 0 c; B6 p9 F' y) w& P
6. Support qualifications, including new packages, assembly/test processes.
. X+ E, `8 j* T" G  R* r 7. Liaison for xx external customer visits and audits to subcontractors. & w# a: H) t2 F
8. Interface with multiple xx organizations located at subcontractors and the U.S. including Assembly and Test Engineering,
4 w5 _5 K$ G" v# A) X4 `; w Failure Analysis, Planning, Customer Service, and WWMfg.
( j$ \( K; u  ]5 H 9. Ability to interface with subcontractor senior management.
+ K0 z5 M" l7 d1 F4 H 10. Perform other functions or special projects that may be assigned./ B+ R  }# a" Z- P7 e5 K
' A, N  e/ _5 r" n  H! ?
Requirement: 4 i6 j+ j. m0 q
1. B.S. Degree in Engineering or Sciences related to the semiconductor industry
6 Y0 i. b4 ~0 s6 l" ` 2. Experience in a semiconductor company with technical competency in Assembly/Test Engineering; knowledge of process control, TQM Tools, ISO9000/TS16949 standards, automotive customer requirements; audit experience
; h* L% L0 {: ^; \9 U- g) w+ s 3. Good communication skills with the ability to interface with senior personnel at subcontractors and with xx; able to function
! b6 n! x) @0 k; b( W# W independently at a distance from supervisor
22#
 樓主| 發表於 2008-4-17 12:38:11 | 只看該作者
ESD开发工程师/资深工程师 (年薪13-20万6 p" X% h7 S6 `# N
% G6 c! N+ U; _" e. s5 m
任职资格: 8 k: k1 {6 Y, l. i) m9 Z
1、微电子类相关专业,本科及以上;
# h9 Q- _  W* n. E4 e. g( c# s2、具有两年及以上同领域相关工作经验,有器件或工艺背景相关者佳;5 |5 I6 Z" ~; ^
3、熟悉ESD基本原理、防护电路设计概念、特性测试;熟悉各类ESD测试芯片设计;熟悉ESD相关设计规则和设计验证。. K% W/ m0 J9 k! y( g" M7 T
4、具有良好的英语应用能力,读写流利;, C  }" M* X8 n% T# N
5、具有主动积极和认真细致的工作态度,注重团队合作。
6 W- H; U# R3 m; t- n. E# X6、有VB、C语言编程能力的优先$ |' O6 ?* \* s  }

+ W3 p/ |' [6 I职位描述:
/ T4 [8 @: R8 @5 ?+ F1. 按时按项目要求完成ESD相关的测试芯片设计和评价等工作。9 e* z: K( S: T8 A
2. 确定ESD相关设计规则并保证其正确性与科学性。
4 t7 Y6 g9 t  \! Z: d3. 给予客户在ESD设计和解决问题方面的技术支持。
21#
 樓主| 發表於 2008-4-17 12:37:44 | 只看該作者
器件特性资深工程师 (年薪15-20万# O) {9 r& d, e5 R! h) O; n6 i% |

7 q: @/ E6 l, A8 t- f任职资格: ; @/ k( A5 H$ t9 ^4 S: E8 t& K2 \
1、微电子类相关专业,本科及以上;
6 k: \0 C# G8 A- {( r2 v2、具有两年及以上同领域相关工作经验,有器件或工艺背景相关者佳;7 C& D9 G; z: G0 U
3、熟悉Agilent HP4156/HP4070等系列测试仪器,能独立完成对器件特性的测试与分析。
: u: G& _/ E, h# V5 _% J/ i0 B) M$ j7 |4、具有良好的英语应用能力,读写流利;
7 X# R! J0 D! [& e# B$ U5、具有主动积极和认真细致的工作态度,注重团队合作。
- G* I7 l; ?! D+ O& Z+ C' [6、有VB、C语言编程能力的优先
- Z& O/ g1 g% g" Y; c) \
* M+ c7 \9 r, C0 T0 S职位描述:
9 }! ~; D' _7 E/ R6 u% ~# B1. 建立与维护各个工艺平台EDR、WAT Spec设计规则' E) S, d) B8 R3 K+ }
2. 支持与对应解决公司内部部门、外部客户的各方面器件特性的问题;
6 v# Q8 j6 ^# v8 t0 K3. 特殊器件的开发,包括结构设计、测试芯片图形设计、器件评价与设计规则发行;& x: E1 i- j7 F9 a, K1 ]
4. 建立与维护各个工艺平台WAT测试程序,对应TD PI的测试需求。
20#
 樓主| 發表於 2008-4-17 12:37:22 | 只看該作者
器件模型资深工程师(年薪15-20万8 D( q3 o( \# D5 t2 M9 y1 g

4 r7 {- v6 A. k4 n任职资格:
# f$ @, }2 T& W1、微电子类相关专业,本科及以上;
. B1 v& T3 A6 |( R2、具有两年及以上同领域相关工作经验,有器件或工艺背景相关者佳;- S; f& ~$ Z! V+ f9 ^- g& e
3、熟悉BSIMPRO或ICCAP模型提取软件,Agilent测试仪器,能独立完成MOS晶体管,BJT等器件模型提取和验证。熟练使用SPICE等仿真工具。
/ t9 o( y$ X- J- K4、具有良好的英语应用能力,读写流利;
; `6 l% I9 b! {- k9 a: Q- O7 ?/ @5、具有主动积极和认真细致的工作态度,注重团队合作。
- o& L- G* u! ^0 Y. w* t  u
; k. T. z6 n1 q9 b职位描述: . l7 |% D+ R/ u8 M
1. 建立与维护器件模型相关测试,提取,QA的环境和流程;
8 l" C2 ~7 ^# Q: ^! o, H% P6 |* D2. 支持与对应解决公司内部部门、外部客户的各方面器件模型的问题;7 {+ n1 X0 B) W4 M) B
3. 负责各工艺模型的建立,更新等工作;" z. k1 b! P& n, H4 Q1 c. Y
4. 建立各种器件模型的能力和提高精度。
19#
 樓主| 發表於 2008-4-17 12:37:01 | 只看該作者
设计规则主管工程师或主任(上海)(年薪18-28万
5 @2 U" q! m% k. _! j: G! x. w9 Q2 K# ?2 \5 n
任职资格: : w2 m) z" X! J* u, q
1、微电子类相关专业,本科及以上;8 Z$ F% B3 Q) J- B
2、具有三年及以上同领域相关工作经验,有设计或工艺背景相关者佳; ) E( t4 J7 u, I* U- M8 V+ x
3、熟悉半导体器件原理,Logic/Mixed Signal工艺,高压工艺,embedded Flash工艺.  
- `) ^$ ~% N4 S. n1 j4.了解电路版图,半导体可靠性基础。
+ i' c* k$ |2 e; P& u5、具有良好的英语应用能力,读写流利;1 z/ u; X" a5 Y# V% k5 e
6、具有主动积极和认真细致的工作态度,注重团队合作。
1 L! ?2 `, E6 r" F! D* ]: K) V! ~7 l
. q- q2 t9 }0 e% {7 P8 i职位描述:
0 o6 v( d% b& s8 |( q) I1. 熟悉所有工艺的相关技术和细节,全局考虑所有技术手册的作成,更新。
, T; N3 {" n! j* s" |. L" `5 r2.按时按项目要求完成设计规则的制定,改版等工作。
' V1 q9 {. L# I$ W! h) t4 e3.全局管理Design Manual(DM)文书的质量,发行和平台资料完整性。
/ n- ?0 z) P& @4.内部和外部用户的技术资料/数据/文档等支持
18#
 樓主| 發表於 2008-4-17 12:36:35 | 只看該作者
器件模型资深/主管工程师(特殊职位)0 ^4 l5 I; i# A
地    址:        上海 (年薪15-25万
3 W# E% ~. a! D3 C1 b
; e& W' a+ K: w3 y* s0 t; H职位描述:        1. 建立与维护器件模型相关测试,提取,QA的环境和流程; ) W# s2 m$ t. C
2. 支持与对应解决公司内部部门、外部客户的各方面器件模型的问题; * O( w, Q: x4 [" o$ @
3. 负责各工艺模型的建立,更新等工作; - F7 {* q; Z% I" j' p
4. 建立各种器件模型的能力和提高精度。
" W" h" c5 S0 q# i
7 x! l' S, ?* P( b$ V' {职位要求:        1. 半导体相关专业, 本科或硕士及以上; $ @. A9 A8 b8 {6 m/ E9 y2 S
2. 具有两年以上相关领域工作经验;
' [0 e  Z! m2 i4 g7 Y3. 熟悉BSIMPRO或ICCAP模型提取软件,Agilent测试仪器,能独立完成MOS晶体管,BJT等器件模型 提取和验证,熟练使用SPICE等仿真工具。
17#
 樓主| 發表於 2008-3-17 12:25:09 | 只看該作者

工艺集成部总监、先进工艺部总监

1)工艺集成部总监 上海! a$ f! k- k- c6 l. d
职位描述:
1 A/ M$ l1 T$ a, t+ G$ {% a1.        根据公司战略规划,在技术副总裁的指导下,参与公司技术发展方向的制定;
1 J/ \1 X3 L8 |# X2.        确定并有效执行本部门的工作目标,带领团队负责新技术工艺集成相关工作,包括制定工艺流程、设定规格、分析制品电学参数、提高成品率、改善工程能力、验证工艺的可靠性等;; C2 N# Z  I# i8 o) l/ i
3.        跟踪工作目标的进展及效果,确保预定计划实施并满足总体要求,带领团队为公司提供可以量产化的新工艺和新技术,负责推动研发成果的转移工作;
) M+ `% q( l2 p7 `4.        带领团队为已量产的产品提供工艺集成、器件优化方面的技术支持。+ g0 f* L: K$ M! o
任职资格:% Q' @: t+ ?4 S" W+ J; C: P
1.        微电子类相关专业毕业,硕士研究生及以上学历;
3 H1 O% N) |% m: D% y2.        掌握半导体基础理论知识,具有十年及以上业内相关职位工作经验,有海外相关工作经验者优先考虑;! }; r1 C5 E1 p; F/ t5 r
3.        熟悉Foudry工艺集成等相关方面内容和Foudry的工艺流程;
7 o6 |8 q# ?. k, C4.        具备良好的团队管理能力、组织协调能力以及沟通能力;
) i# s8 F) V- r+ d+ n5.        具有优秀的英语应用能力。5 r3 b/ |) `5 G" @

( u+ t6 G1 H! _1 |0 E. b2)先进工艺部总监 上海( A+ {5 M2 ^* ^
职位描述:
# `+ g. z  w: F3 ]2 D$ ~* k" V1.        根据公司战略规划,在技术副总裁的指导下,参与公司技术发展方向的制定;
/ W" ]6 g) A  j2 j$ h+ T1 o2.        确定并有效执行本部门的工作目标,研发先进的半导体制程中的模块工艺,为公司建立和引进新的产品系列提供模块工艺技术;$ q  ]- t* [  t2 z; X$ V$ r
3.        跟踪工作目标的进展及效果,确保预定计划实施并满足总体要求,带领团队为公司提供可以量产化的新工艺和新技术,负责推动研发成果的转移工作;
: i& M$ u/ ~" s( r4.        带领团队做好支持TD工艺集成部及其他部门建立TD工艺流程,并及时高效地提供TD晶圆线上的工艺支持。
4 \8 ^5 d! J/ i5 F任职资格:
; W2 v0 H; g  b" j0 n6 N- m5 n1.        微电子类相关专业毕业,硕士研究生及以上学历;
) l+ x! [! r! v' f2.        掌握半导体基础理论知识,具有八年及以上业内相关职位工作经验;
. P6 P1 F) {4 ]3 {5 q3.        熟悉Foudry先进工艺等相关内容和Foudry的工艺流程;
; k. q2 V/ R5 \4.        具备良好的团队管理能力、组织协调能力以及沟通能力;
7 S5 J; x) R- ?- T5.        具有优秀的英语应用能力。
16#
 樓主| 發表於 2008-3-17 12:23:18 | 只看該作者
15) Test Automation Engineer
& L6 H- @' r  E+ c
- U4 {+ c& y- x! Z% y5 Y1 s; BExpert knowledge in TCL and Perl programming & q) Q8 E+ i- ?' h0 D
Expert knowledge in IXIA, SMARTBIT and N2X
+ J: D* |4 P* M; @) `responsible, self motivated and be able to work on and complete project independently / T! g; J' ]5 u8 f7 L
3-4 years of telecom/datacom industrial experience
15#
 樓主| 發表於 2008-3-17 12:22:59 | 只看該作者
14) Senior ASIC Verification Engineer
- v) }$ m# o  R* S; u+ V" i
/ l9 b" i& F  H: IJob Description:) {  D4 }, @( E2 k) k
Functional verification of complex networking/Telecom ASIC/FPGAs.
' t( K* F  _6 j! a* VDocumentation and review of Verification architecture and testplans
7 T0 @+ {; q& Q* fDevelop verification environment using HVL, such as Vera/Specman
+ t' M: `  W" N- c0 V% lDevelop random, pseudo-random and directed tests
* q  U5 o/ N1 U1 U) tEstablish verification effectiveness using assertion/functional/code coverage and code reviews8 z5 L8 R+ X, }
RTL and gates simulation, debug and root cause
( t% h% m. `% rRegression and debug" ]* k5 x( n) j
Lab debug and design validation
, O" h! x4 j4 USkills required:- X; i/ j6 V" q/ w) _% w* C
4+ years experience in design verification on complex ASIC/FPGAs.* F: N1 u) a! j6 k
2+ projects verification experience   s  N9 t8 \2 v3 b; m7 \4 @" t
In-depth knowledge of HVL(such as Vera, Specman) verification platforms
  \* P! J; U" Y3 f4 @1 s3 jGood knowledge of Networking, Ethernet, Telecom
5 O( R0 ]4 J+ Z8 X) H" A) Q9 P  Q0 oExcellent coding skills (such as E, Vera, C++, Verilog, Perl, TCL)! N4 r: U4 W$ e$ g
Outstanding written and verbal communication skills in both mandarin and English0 G3 Z% f# D0 K+ }8 p3 b6 \3 X4 Q
Capability of critical thinking, challenging design intent$ U: J8 j9 @6 @$ _' ?% A. N% V4 |
Demonstrated understanding of networking/telecom concepts. 3 q. Q2 Q( E3 F. @8 B

1 W5 p! ~3 e" b3 ^Education and experience:
# Z, F  v- o: [. l( q$ }Requires MSEE/CS combined with 3+ yrs related experience or BSEE/CS  with 5+ yrs relevant experience
14#
 樓主| 發表於 2008-3-17 12:22:23 | 只看該作者
13)Senior Level Layout Engineer SHANGHAI
. ?; l6 x$ a" ?( Q' e+ ~( n
) X' \" q( e2 t& `% F7 [# H+ sVery familiar with mixed-signal/RF system layout. In the chip level floorplanning, estimation and construction, cell and block level layout as well as verification including DRC, LVS and PEX. An excellent communicator with the ability to interpret and apply complex principles of mixed-signal/RF circuit design.0 S2 X: p  j8 r7 M+ Y! a& W! _

1 `2 X7 ?  B. N3 ~, J! PFamiliar with layout tool (Calibre, Virtuoso Layout XL, Dracula) # D* B) f8 S: e3 J: h" x
Handle foundry interface requirements and direct/assist junior layout engineers.
2 u; n/ J$ ?2 U" w( uFive year+ experience in layout7 F4 P9 Z: c/ R: i. F* y& Z
BS or Above with major in EE
13#
 樓主| 發表於 2008-3-17 12:22:03 | 只看該作者
12)Bluetooth Application Engineer Shanghai' j8 d2 B7 Y  G( q
7 N7 Y4 p+ d! Z
Responsibilities# ^$ s' `9 P2 ]6 x. z/ Y
* Understand and help adapt Bluetooth upper stack to specified customer environments
$ v" L5 Y, G+ q9 O * Help debug and integrate Bluetooth SW/FW into customer systems
3 Y% c8 x3 M' y6 E* q: ^3 Q * Support sales team and FAEs as needed5 L9 i5 X4 N& X! @! t1 H

) B0 t7 l# V8 d+ k) o; ?% HRequired Skills and Experience
  y: f$ L  |# S- ?" r5 I * Minimum of 2+ years of Application engineering and/or Software Development experience% Q: f( k# s- G7 C
* Experience in C development) q- @) p& s' b1 P7 L& ]0 d! {
* Experience working with customer
# y3 u5 K; }' i( S" y * Experience in communication protocols(Bluetooth) is a plus4 k  \9 p' n" k
* Knowledge of ARM architecture, embedded OS and SoC architecture is a plus
12#
 樓主| 發表於 2008-3-17 12:21:41 | 只看該作者
11)Manager, Market Development BEIJING
5 v. L6 p8 P# Q! u' R3 l# C& w+ |0 B8 f0 S+ {
Description            ' |! ~  A* T- y
Responsible for revenue generation through sales & new designs, to exceed or meet corporate goals, 3 d( ^- A; q* ~/ R/ x5 m8 k
Ability to recognize & identify key opportunities. , `' ~  f3 o0 ?7 X+ o" \
Capable of identification & penetration of “key technology drivers” in the area, with the ability to forge relationships at the      
( ]& F& d& j3 h/ W: |9 y- q- `9 emanagement level.; w5 H4 H/ H! [( j# L5 s. S
# S! L1 k: A/ |9 q7 L, J
Essential  duties    y# l: a8 p/ w$ v; q5 {( T
Quotes prices to customers and may have administrative duties.                    2 a1 n+ J1 y" f" P( ]3 F
Responsible for account development and maintenance.                                       
/ p* C" _, h1 P0 J3 z% u! Y$ NMay supervise the activities of lower level sales managers and provide them  with  guidance,  direction and development through coaching and mentoring.                                                                                                                           
0 g0 W. O/ F) R" C4 o4 B& n% z) P( wResponsible  for  driving  business  relationship  with  distributors,  including  the  implementation of measurable objectives for meeting ! J( {/ |" v+ Z' W* H+ o8 |
bookings,  revenue  and  design  win  goals.                                                                  ! l- [, m' f/ [2 K9 F$ k5 p+ Q
May also be responsible for own  personal  accounts.                                            8 U. O& ~5 \, t* f9 f, P" u& R& d/ S
Performs other work related duties as assigned.                                                  
1 W1 y; V3 y) i+ L0 u
1 R2 E, m" q# fQualification        - S4 W3 Q4 q* t) W
Demonstrated comprehensive understanding of Analog/Mixed Signal           
! n( Z0 r4 t7 r4 c% @      
0 W  U2 B4 ?2 e5 C0 yRequirements         
! X% o% O+ T3 Z( Dtechnology,  &  telecom  systems.                                                                                    
. ?% I( ~) P5 _1 P$ F3 l! G& x* VA  minimum  of  10  years  demonstrated  experience  managing  an  OEM  sales organization.                                                                                        Ability  to  articulate  the  value  of  the  Semtech  product  line  to  the end-user community.                                                                                        Must have excellent customer service skills,  with the ability to foster a teamwork environment.
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