請教 Synplify "reduced to a combinational gate by constant propagation"

kuhwakimo

請教 Synplify Pro9.6.1 Warning Message
Sequential instance sLateCol_p has been Sequential instance sLateCol_p has been reduced to a combinational gate by constant propagation
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請教個問題，下面是Synplify 9.6.1 出現的Warning message ,
請問這是什麼意思　??
我由字面上的理解得到的猜測是，將一個本應該是FIFO Sequential circuit ,合成為 Multiplier Combinational circuit
& e2 i' P4 V& S9 @. U& D, q為什麼　ld_tdr_cur_f　會被合成為Combinational, 但是 dly_tdr_wrn 卻不會 ??
6 b( K( p& M6 h5 i誰有相關的經驗嗎 ??
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' f" X3 P/ l7 `- [7 Z@W: MO129 :"\projects\dm8606c\rtl\tff256x64.v":932:3:932:8|
Sequential instance ld_tdr_cur_f has been reduced to a combinational gate by constant propagation


     reg ld_tdr_cur_f;  
4 X3 y& ?1 {$ k9 D7 P$ y! d     reg dly_tdr_wrn;
$ |; S# n" a$ `   //------------------------
  i3 X; v' G, @: I; ]+ E   // delay 1 clk
. D* w6 c. f) c# \# M. O5 D   //------------------------
/ |0 ^1 Z4 H- v+ C   always@(posedge sclk)
& O0 W( W/ a$ `3 N7 A8 z3 |   begin
# ?" G$ k0 R$ J3 L      ld_tdr_cur_f <=#td1 ld_tdr_cur;
      dly_tdr_wrn  <=#td1 tdr_wrn;
) ]  Q" J0 T# \   end
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// 下面是 ld_tdr_cur_f , dly_tdr_wrn 的loading
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   always @(posedge sclk)
$ p5 A) ]) m8 P      if (ld_madr & !wr_nxt_tdr)  
         wr_save_1st <= #td1 wr_counter;
! Y$ W" S! v, G( D4 q) D      else if (ld_tdr_cur_f)      
         wr_save_1st <= #td1 wr_save_2nd;

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   always @(posedge sclk or negedge rstn)
      if (!rstn)      
" s2 G" c2 F# |+ O) [4 X         rst_ff_pt <= #td1 1'b0;
      else
) ?1 _7 U: E+ P% l: _. q  p$ _# o         rst_ff_pt <= #td1 (!tdr_wrn & dly_tdr_wrn & tdr_empty);
         

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   always @(posedge sclk or negedge rstn)
& m% F% c' P" G. ]$ X: d( Y! M      if (!rstn)      
, f8 i4 Z  O5 I9 ~/ ~3 V, {* M4 |         rst_ffpt_sync <= #td1 1'b0;
% @' W1 s& T, y5 ~  ]      else if (!tdr_wrn & dly_tdr_wrn & tdr_empty)
         rst_ffpt_sync <= #td1 1'b1;
8 b: o: V  U7 q* }5 ?* d      else if (rst_ffpt_clr2)  
         rst_ffpt_sync <= #td1 1'b0;

kuhwakimo

是貼上去的時候出現亂碼,更正如下   
, p4 V% m6 K- ~//------------------------
3 K  z. Q- x; }' g2 W$ U   // save start pointer for 1st pkt
5 [2 y# n, y( C" z8 n( z   //------------------------
2 W' X$ o  S$ |( E! m% @   always @(posedge sclk)
3 R+ p* Z5 }5 {+ N      if (ld_madr & !wr_nxt_tdr)  
         wr_save_1st <= #td1 wr_counter;
      else if (ld_tdr_cur_f)      
( G% A% K: ^) Y: Q; D. Y9 m3 P         wr_save_1st <= #td1 wr_save_2nd;

yadog

不清楚要实现什么功能

2 b/ G6 j( R0 E但是在写法上有些问题
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if (ld_madr !wr_nxt_tdr)   这句是否笔误？ld_madr ，wr_nxt_tdr是两个信号把？

/ J1 h) R$ M" L8 U& g另外if else if写法均不完备，建议将else项完备