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本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯 " Q7 O5 ]0 |6 f- n
" I% R6 `0 r- J9 Y e' zC2 CC1200高清编解码芯片
: `" H' S8 T8 q3 H+ E3 Q2 |CC1200 Media Processor Famiy
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6 \" z) N/ ^0 d8 sCC1200 Family
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CC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance.
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6 A" f& I( V% m2 l. DFeatures
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High applications and media processing performance 8 ^. x% I0 i0 @! s+ c
d+ n' f* i6 U) K+ u" E: G" ODual Core SMP 4-way superscalar RISC architecture @ 350 MHz
' W) P) R- T) {& _Dual hardware threads per core ) I' `0 `3 H8 L, h
256-bit SIMD Vector Unit
- U/ W5 Y# X" n i4 j& q( `- [Codec Acceleration Processors for digital broadcast standards
5 Z$ x7 M2 W! i& p2 bMotion estimation, entropy engines
9 f+ N* n( v2 s* b9 t2 a2 T6 D+ I+ _2D Graphics Accelerator with DirectFB, OpenVG 1.1 support . \- Q% n4 |, x, A+ S; t0 ^
Display Processor
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Extensive rich media codec support
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H.264, MPEG-2/4, VC-1, FLV, RM * a6 O# \, a- V% r! P `
Decoding of digital broadcast standards up to Full HD
; c, t" @& [/ {5 L3 y& b4 r0 J- r, GDecoding of internet content standards up to 720p
' f8 B. K4 A. h& E8 b, P$ mEncoding at D1 resolution and above
$ K$ U" |9 K: K& K8 z7 Y( qHigh level of device integration % s1 ]3 O7 q2 g5 x
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DRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB
0 W- v0 H% L* a4 s$ A9 S0 Y; CParallel NAND Flash
. {5 A/ M$ k2 ~0 Q( m: {Ethernet 10/100/1000M MAC with RMII/RGMII interface & S) N$ D0 g$ t' n/ Z- }3 ^: s$ F/ d
USB2.0 OTG , q4 ~6 M( Q9 L K$ j# Q, G
PCI-Express: Ethernet/WiFi
$ Q7 q y8 e& i" D- ?& dSDIO
" a n& [3 T% U, O& KMPEG-2 transport stream : X* l* J9 H! w) A$ p6 G
Digital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S
( {5 b/ o' r% i9 nAnalog Video Out – YPbPr, CVBS
" H7 H% ^3 F/ R3 k1 P: c& f tPackage: 27mm x 27 mm, Pb-Free
+ e* D- b3 p, t: Y" eCC1200 Block Diagram6 W, J' ^ B3 R& {: n
8 r8 U* m' s9 b2 c2 HSupported Standards( o9 [6 D7 g$ R$ B* W0 B# C
The Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards
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