about FSK data question....

super

Dear all :
3 N. ~& M) i5 L& r5 K( G% v              In fsk close loop direct Frequency modulation ,
) U, l2 A, d; n: S8 B          1.  data rate is higher than loop BW  or lower than loop BW ?
          2.  And what's the relation between data rate and Loop BW ?
& f. T- C/ d" P/ w' a7 L
           Because modulation from VCO , it's a high pass function for VCO vs PLL.
+ |0 [0 [4 L4 t! q           If modulation frequency > BW , it will be supress by VCO vs PLL transfer function.
7 S" H' m$ ?8 P. K2 w3 Z3 x           It will be trace and fix it.  So modulation function is fail.
             Is this concept is right ?
                  
                    Thanks .

simenkid

1.data rate可以高於loop bandwidth, 也不可以.端看用什麼architecture
2.假使單純在multi-modulus或是由reference端做調制, data-rate高於loop bandwidth則勢必產生失真
( ^/ O" ^' R5 j% X" G
直接由PLL Synthesizer調制提升FSK, FM, GMSK等固定波包調制之data rate
) d* w/ V0 f% y1 R4 b# \可選擇如pre-emphasis或two-point modulation(同時兼顧inband與outband,理論上無頻寬限制)的方式