SVTC Technologies Selects Synopsys' Manufacturing Tools to Accelerate Time to Commercialization | 7/14/2010 |
Open-Silicon Integrates 50 DesignWare Interface and Analog IP Products with 100% Silicon Success | 7/7/2010 |
ARM, IBM, Samsung, GlobalFoundries and Synopsys Announce Delivery of 32-/ 28-nm HKMG Vertically Optimized Design Platform | 6/17/2010 ( ^, u; F- [, [, t$ V9 z% _# X" Y
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PrimeTime 2010 Scales Timing Analysis Beyond 500 Million Instances | 6/17/2010 |
Synopsys Delivers Optimized Lynx Design System for Common Platform 32/28-nm Technology | 6/17/2010$ Y( [$ M( k* |9 |8 r
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Synopsys Unveils Galaxy Characterization Solution for Standard Cells, Complex Macros and Memories | 6/17/2010 |
Synopsys Unveils StarRC Custom 3D Extraction Delivering 20X Speedup | 6/17/2010 |
Synopsys Delivers Comprehensive Custom Design Solution for TSMC Analog/ Mixed-Signal Reference Flow 1.0# L/ A7 D0 o9 T9 [4 Q3 I
| 6/11/2010
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Synopsys to Acquire Virage Logic
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Synopsys and IEEE-ISTO Launch Technical Advisory Board to Evolve Interconnect Modeling Standard ; K: R2 f* B5 B& `& z, F
| 6/7/2010
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Synopsys Announces Synphony HLS Support for Xilinx Virtex-6 FPGAs
8 }; C' O6 C( x0 i2 ~ | 6/4/2010 7 F! h7 L+ e. m& B: G
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Synopsys Press Publishes "The Ten Commandments for Effective Standards" 8 ?8 o9 `- K4 U+ Z/ L& U9 y$ y
| 6/4/2010
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Synopsys Collaborates with SMIC to Deliver USB Logo-Certified DesignWare USB 2.0 nanoPHY in SMIC's 65-nm LL Process Technology
8 P0 X; m3 g5 R) N: m! v+ t9 V | 5/13/2010
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Latest Synopsys IC Compiler Release Delivers More than 2X Speed-Up, Enhanced In-Design Technology and Production Support for 28/32nm ; ?2 P6 @" D5 h. \3 P& U
| 5/7/2010
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Synopsys Unveils Ethernet Controller IP with New Audio Video Bridging Feature # Z" u) q G6 _3 ]
| 5/7/2010
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Synopsys Launches Industrys First MIPI DigRF v4 IP ( U8 |3 y) A4 o g
| 5/3/2010 ( S" I; H; P6 V" o
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New Synopsys Universal DDR Controllers Improve Performance and Reduce Cost of Embedded DRAM Interfaces
2 ? G0 E2 p# Z* F | 4/28/2010 5 k2 b" J N$ Y3 ?* m9 w
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Synopsys Announces Support for Actel's New SmartFusion Intelligent Mixed-Signal FPGAs 2 a- t: u4 w' B6 Q
| 4/22/2010
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Synopsys Introduces the HAPS-60 Series of Rapid Prototyping Systems 0 x# E Z6 G7 H) O, H j
| 4/19/2010
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Synopsys Expands IP OEM Partner Program with Two New Members 1 j' M# B' N$ f# S) m
| 4/14/2010 $ N& f6 {" ?8 u! @# I
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Synopsys DesignWare DDR multiPHY IP Supports Six DDR Standards In a Single PHY & I- W# j2 O0 R# X$ b
| 4/7/2010 7 g8 o. ?' _. K- C; P6 R; W
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Synopsys' DesignWare SuperSpeed USB 3.0 IP Receives USB-IF Certification ) h( m6 u5 z) U4 L" @ A
| 4/5/2010
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SiliconBlue Selects Synopsys as FPGA Synthesis Partner for Its iCE65 mobileFPGA Family
9 l4 e& d( y8 I+ D! s | 4/1/2010
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Synopsys Galaxy Implementation Platform Enables First-pass Silicon Success on Infineon's 40-nm X-GOLD 626 Wireless Product 0 D' O. V4 R% f7 _ s# Q
| 3/30/2010 5 @5 x9 L) c$ `3 M. a. }+ B1 X
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Design Compiler 2010 Doubles Productivity of Synthesis and Place-and-Route " A4 S) E: \3 j1 d; @5 A- x! H
| 3/29/2010
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Nationz Technologies Achieves First-Pass Silicon Success with CustomSim Mixed-Signal and VCS Functional Verification Solutions 8 j( b1 [6 T2 o, [
| 3/23/2010 ' u8 K ^8 t. b! M% q) h
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Renesas Technology Adopts Synopsys Proteus OPC for 28-nm Development 3 w7 J( ~( M1 b l6 {- h$ ]
| 3/23/2010
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Synopsys Completes Acquisition of CoWare
% N6 ^5 ?7 c3 i) i9 L. o% s | 3/23/2010
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IMEC and Synopsys Collaborate on 3D Stacked IC Development # c0 }+ Z% F$ K% |! ]+ _
| 3/10/2010 8 }* w! L& y1 m& k+ x
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Synopsys Galaxy Custom Designer Accelerates Analog/ Mixed-Signal Engineering Productivity with Built-in DRC Visualization and Correction ! h1 k( u0 `* [( ^
| 3/10/2010 ) z) f: {8 ]# k' @! O% G; m
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Yamaha Tapes Out Graphics Chip with Synopsys Design Compiler Graphical
3 [; W* q/ \3 Q+ G | 2/9/2010
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APAC IC Adopts Synopsys Galaxy Custom Designer Solution for Analog/ Mixed-Signal IC Design Services
# F G4 ^; j; _ | 2/8/2010
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Synopsys to Acquire CoWare : _: R0 E w* d: f& y. \: M4 `
| 2/8/2010
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Synopsys Acquires VaST Systems Technology 3 Z. j6 u: s$ M$ c v' ~0 {
| 2/3/2010 ( ?- R/ j, F; K8 z* L4 ]4 q- Y& a/ u
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Synopsys Expands DesignWare IP Portfolio with MIPI IP Solutions 0 M. R' q9 Q/ }2 F
| 1/25/2010 / `6 D. n: L# K) Z6 O1 _
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Synopsys Launches DesignWare HDMI 1.4 Tx/Rx Controller and PHY IP Solutions for 40-nm Process Technologies 9 {4 s2 o- P m# ~
| 1/25/2010
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Toshiba Information Systems Standardizes on VMM-LP Low-Power Verification Methodology ! M, T- m. F8 n# S* i& K& Q
| 1/25/2010 ( I' s0 s( n. S* o& k3 C
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Synopsys Announces DesignWare Protocol Analyzer for Verification of SuperSpeed USB 3.0-based Designs
! `2 x- `# s# l/ H' U | 1/13/2010
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Synopsys Introduces SystemC TLM-2.0 SuperSpeed USB 3.0 Models ! r1 }% T1 p; h6 `) j
| 1/12/2010 5 K4 F/ s6 Z2 F- h% F+ ~0 B
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Synopsys Multicore Technology Speeds Timing Sign-Off by 2X
( S) \5 i* P [9 |1 p0 k% }2 | | 1/11/2010 ) S& Q& v# B8 C
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