Chip123 科技應用創新平台

標題: Overview on ESD protection design for mixed-voltage I/O interfaces [打印本頁]

作者: semico_ljj    時間: 2008-10-24 08:21 PM
標題: Overview on ESD protection design for mixed-voltage I/O interfaces
Overview on ESD protection design for mixed-voltage I/O interfaces
% Z, T2 m6 ]  z4 uwith high-voltage-tolerant power-rail ESD clamp circuits
; t& j6 k0 v" \$ r' v+ @  b- I+ v( jin low-voltage thin-oxide CMOS technology
4 g3 I! q9 L4 i
* w. n3 l# A; V$ t5 I3 w) JIntroductory Invited Paper5 m- |3 [2 \) [0 u
Ming-Dou Ker
- W; v" Z  \' |
' s6 {7 J$ P, W5 H: p7 A
作者: ulysseslaii    時間: 2008-10-25 10:41 AM
標題: good
goodgoodgoodgoodgoodgoodgoodgood
作者: heyunpro    時間: 2008-12-3 10:45 AM
goodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgood
作者: cedric761193    時間: 2012-5-13 03:44 PM
The ESD is easy implement but difficult to design.




歡迎光臨 Chip123 科技應用創新平台 (http://chip123.com/) Powered by Discuz! X3.2