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標題:
Overview on ESD protection design for mixed-voltage I/O interfaces
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作者:
semico_ljj
時間:
2008-10-24 08:21 PM
標題:
Overview on ESD protection design for mixed-voltage I/O interfaces
Overview on ESD protection design for mixed-voltage I/O interfaces
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with high-voltage-tolerant power-rail ESD clamp circuits
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in low-voltage thin-oxide CMOS technology
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Introductory Invited Paper
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Ming-Dou Ker
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作者:
ulysseslaii
時間:
2008-10-25 10:41 AM
標題:
good
goodgoodgoodgoodgoodgoodgoodgood
作者:
heyunpro
時間:
2008-12-3 10:45 AM
goodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgoodgood
作者:
cedric761193
時間:
2012-5-13 03:44 PM
The ESD is easy implement but difficult to design.
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