3 [& Y( D7 U' a# _- ZSenior / Digital ASIC Design Engineer0 A2 M- n5 t$ W; F
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1 W8 K) ~ u) r$ G q$ m e' ?Responsibilities: " p& o4 g3 F! y: P3 I2 ~ - T; L. \, G6 k
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•The Digital ASIC Design Engineer will be part of the team responsible for the design and development of capacitive and/or piezoelectric MEMS interface ASICs. He/She will the responsible for the digital blocks including serial interfaces, control logic, DSP blocks such as digital filters, feature detection logic and other digital application accelerators. * r/ k3 m5 J9 k" `& I- l) A•The responsibility of the Digital ASIC Design Engineer includes scheduling, design, simulation, synthesis and layout of critical circuit blocks, including pre- and post-silicon verification. 8 U* a4 P2 v+ Q5 V* A! r- I& A: `7 b
•It is also expected that you will conduct periodic design reviews, including with application engineers.' L" `# w0 e; l- ?
6 x4 Z, `# B% V s. A0 G7 u" B9 S$ V2 u7 r Requirements:& W$ y% T( K0 Q! o
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•Master/Bachelor’s Degree in Electronics/Electrical Engineering. 0 D! s: {! c1 s0 Z9 H: S
•Minimum 1 to 3 years experience in Digital ASIC design. , n+ V9 q( l2 Z; n3 K•Very good knowledge of CMOS processes. # u9 C4 o# b n. A& j( X) ]: ]•Highly proficient in modern ASIC design tools, both frontend and backend. o- `% c/ a/ U1 K- p& B•Experienced in design of I2C, SPI, control logic and DSP building blocks. # ?+ s1 z7 l2 r
•Skilled in laboratory testing of IC prototypes. 7 ?- I: H3 f# }/ Q. I8 F4 d
•Able to develop circuits from algorithm to synthesis. 2 W2 ~" H' o4 }4 q ?) g* I6 H- D& o5 _•Knowledge of Linux operating system required. 6 D9 c* }0 m6 x# K: t•Experience in MEMS interface ASIC design advantageous.: A" O: q' x2 W, y6 |! j( Y% j" B
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請聯繫我電郵：qianqian@uniconnect.com.sg，Skype ID：zhou.qianqian.uc，或者直接撥打電話+65-63251262無時差。 , `" J. p1 N+ _$ u6 l) d$ N4 e ; h. J3 I2 S. `5 `8 W( p期待各位朋友來信！