* i A( J( D3 ]招聘要求： 3 B" G- G! u; e# q9 H) @& i5 P) e1. 硕士以上学历，能够读写英文 1 z- ^ i2 p- V
2. 8年以上直接的从事集成电路芯片版图设计工作经验 4 w, N. z; O5 o% f( I3. 熟悉模拟电路，对射频电路有一定了解者优先 3 t }4 m8 H0 I* `
4.有良好的团队精神，较强的沟通能力作者: ranica 時間: 2013-10-14 04:00 PM
Software Engineer-几何图形处理 2 C6 }" L/ p7 k- y6 B% M6 D公 司：A famous IC company- g! F( d7 T/ k
工作地点：北京 1 w# g) n3 Y$ }% X$ p. Q5 z 6 h! H. S, d' E2 J9 u2 n( t6 D# P9 v6 YPosition Summary: , r/ q; v0 ^' N M1 D
Software Engineer for post-layout IC-Package-PCB co-analysis * o2 `7 p, F3 o- ~; Z
Essential Job Functions/Accountabilities: 5 X8 J" v0 Z& C5 `
Maintain and develop computer programs to translate and process IC/package/PCB layout and prepare geometry data for the co-analysis. Work closely with the Product Engineering team in product development and testing. ) Q7 Y: _! ?5 [" ~' u
$ y- s$ {0 T/ [# U {8 u- I1 {' D' ^Minimum Requirements/Qualifications: ( C' t3 h' I+ s% [9 _
Proficiency in C++/C, OpenGL or Qt graphic programming experience is required ; {' ?6 N2 I% J2 lStrong background of geometry processing and related algorithms 4 P+ B7 V0 M k( {3 P( LExperience in numeric results post-processing such as graph, contour plots + J$ |! n! a) [6 N7 T+ G3 p
Knowledge in CAD formats including APD, Expedition, PADS, ODB++, AutoCAD, GDSII and Gerber is preferred 8 g( T+ I% Z! D0 @8 {: bExperience in tcl/perl and Linux shell scripting is a plus作者: ranica 時間: 2014-12-4 11:28 AM
数字版图工程师 - P! @( |! S0 J. k公 司：A famous IC company- \: ?6 J/ z! v+ D9 ]" X/ k
工作地点：苏州4 e, s- N! O a* P: g U: t: n
3 u0 G. `! U' L+ J( u职位描述 " L {' z: J& G5 k9 D2 a工作岗位: 芯片级后端设计,包括与前端工程师配合完成布局布线,时序收敛,物理验证和完成流片. % x3 J: I# r- y6 w