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標題: A famous IC company looking for Analog IC circuit design [打印本頁]

作者: ranica    時間: 2011-7-15 12:20 PM
標題: A famous IC company looking for Analog IC circuit design
本帖最後由 ranica 於 2011-7-15 01:47 PM 編輯 ! K6 w' q4 `/ K' ~0 U

& F- t) `2 s: m$ e招聘公司:A famous IC company: e7 T- j  D. L9 L
工作地点:Beijing! l4 b% ]6 p1 h7 e3 |- \* t( v% ^
岗位描述:
( r0 D1 u7 y: ?( R· Analog IC circuit design, simulation and verification% }% K6 e0 c/ Y& a3 k
· Design analog products and blocks such as high current or high capacitive load output drivers, operational amplifier, comparator, voltage reference, oscillator, error amplifier, voltage regulator etc.
2 E# A) u1 F, A· Design of the switching power IC, DC-DC converters, for mobile/portal application# A2 T# V2 }, r2 b
· Evaluation, simulation and analysis of power architectures and circuit topologies& X* |6 L* m# X% i- w2 M
· IC layout including floor planning, DRC, LVS, and LPE7 a+ m$ `3 j/ _* V+ e3 t2 \7 Z
· Work with application and testing engineers to define optimal characterization and testing solution# l& L8 r/ s1 O! i" ]+ {( M
· Work with product definers and product engineers in full product development flow
& f( Y$ p/ \7 l职位要求:
7 U: g0 @7 `2 CExperience Required
6 F+ T' u- w( p/ r4 u: t- @% B6 |3 x% M· Minimum 5 years direct DC-DC IC design experience, with MSEE or above degree
) q' H7 q9 x4 W' h/ ?· Strong knowledge in analog CMOS and Bipolar IC design
1 s7 C, [% z2 k6 o1 V# ?· Working direct experience with switching power supplies, DC-DC converters, Battery charger, and their various topologies
& ~8 B7 Y" N4 i0 [$ }· Theoretical understanding of the power electronics, switching power supply topologies
, m+ P8 N6 ?2 K· Prior experience with power management related IC design a strong plus
$ _$ R: b7 n- O  J+ O8 s- k% R# @· Knowledge in analog IC layout
; O5 D* t" n3 ?9 E; X! C· Matlab/Simulink/VerilogA or other behavioral simulation expertise a plus# U* Y% _' c; P( |" A# h
· Excellent written and oral communication and presentation skills4 i1 p! x  a1 U( A! x
· Satisfactory written and oral communication skills in English
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! o& H  S( G6 L' H+ ^* qEducation Required
! `8 N- E$ v3 ]" c& f1 S* n+ r MSEE degree or above or equivalent experience8 q7 s1 B& d. O- m8 o& t4 `

6 ]6 V9 g. g/ l$ |8 jOther
8 d$ m5 z0 O0 L  ~. ^( F Strong communications skills; written, verbal, presentation and listening;
+ N8 N, S, `( |2 p4 n4 J Good interpersonal skills to work in a team environment;7 w* |0 q/ F* L2 u
Good command of written and spoken English required; 3 H9 q/ ^# p+ Y' f1 m
Excellent interpersonal, written communication and presentation skills
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:46 PM
標題: Analog Layout Engineer
招聘公司:NO.14-A famous IC company
( x. \$ X; L7 g1 _  ]2 K/ Y招聘岗位:Analog Layout Engineer
: p2 F/ P9 }' z/ U7 Y" L工作地点:Shanghai* O; C. x9 h' P$ D4 O
岗位描述:We expect the engineer to work mainly on analog custom layout design. Help develop CAD capability and automate our design flow.4 @1 G9 l4 j  M9 v

" W  e* U, @& O& ^" _职位要求:
9 k6 V4 S' H& H  n5 D' ?6 @. R" o1. Education: a) Graduate from a well recognized university. b) Major in electronic/electrical engineering program is preferred, although other related programs might be acceptable. c) Bachelor degree is a must, master degree is preferred. 2. Work experience: a) Minimum 3 years layout work experience in a well recognized company. b) Experience in CMOS deep sub-micron process, like SMIC 90nm, TSMC 90nm, or bellow. 3. Skill: a) Virtuoso layout tool is preferred; other layout tool skill might be acceptable. b) Familiar with Calibre, or other physical verification tools. c) Good knowledge on CMOS device physics; certain knowledge on circuit theory. d) Unix/Linux. e) Good with Perl and other scripting languages f) Comfortable in communicating in English, both writing and speaking. 4. Other: a) Have the initiative to work on layout. b) Open mind to learning new things.
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:47 PM
標題: Verification Engineer
招聘公司:A famous IC company% D, m* y: U6 I5 ?4 _
工作地点:Shanghai2 J9 n% T# b/ B
岗位描述:Responsibility Responsible for chip/block level design and verification: micro architecture, RTL coding, simulation, verification strategies, test plans, test automation, system configuration, and environment setup.7 r- D2 v( E* S$ d! H

6 M/ y* Z: T) J  {职位要求:
8 q' n4 L9 D! M9 mEducation Bachelor or Master degree in Electrical Engineering or Computer science or related field. Experience Detail and discipline oriented, team work oriented Understanding of ASIC/FPGA design/verification flow Familiar with some of the EDA tool such as Verilog/VCS, Synthesis, Timing Analysis, DFT, FPGA is required Network protocol and system knowledge highly desirable (Ethernet, IP, ATM, SONET, DSL, EPON/GPON) Strong skill in C/C++ UNIX scripting is desired1 c$ D7 }: Z, u, J: U" J

9 i& ^1 `  [  `" X2 C能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:49 PM
標題: ASIC design
招聘公司:A famous IC company
- Q" E4 D. o+ E' L+ l  ?工作地点:Shanghai! j& p- z- z) r" G# {% s' Z) }
职位要求:
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3+ years experience in ASIC design -> must · BS in Electrical Engineering (or equivalent) is a must have, MSEE is desired -> BSEE must, MSEE plus · Experience with WIFI or related wireless technology (i.e. WIMAX, 3G, LTE, etc.) desired -> plus · System on Chip (SOC) Integration Experience, including AHB/AXI, CPU integration -> plus · Experience with interfaces such as PCIe, Ethernet, DDR, USB -> plus · Working knowledge of networking protocols such as TCP/IP, 802.3, 802.11 -> must · Working knowledge of C programming language -> must · Experience with Medium Access protocols a plus -> plus · Must be expert in Verilog RTL language -> must · Must be familiar with the ASIC design flow from RTL through synthesis, including the tool flow. -> must · Verification experience – Verilog, System-Verilog, Coverage Analysis -> must for verification engineer, plus for design engineer · FPGA emulation experience -> plus · Chip bring-up experience, including use of Logic Analyzer and Oscilloscope for debugging -> plus
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:50 PM
標題: RF engineer
招聘公司:A famous IC company/ n: n6 c: g, Q1 d; _
工作地点:Shanghai
% G" H  j# z: m% ]岗位描述:/ x! W% F0 U' F1 F

8 Y& i) g* K2 @5 hResponsibilities 1. RF system design on schematic and PCB layout review, including critical component specification and part selection, RF chain margin calculation, device interconnection check, PCB EMI analysis and cross interference check. 2. Perform board level debug and testing including impedance matching (noise figure and gain for RX, power and efficiency for TX), device operating point optimization, RF calibration, 3GPP non-signaling/signaling testing target for GCF compliance. 3. Collaborate with core team engineers for specific issue logging, feedback, debugging and problem solving. 4. Provide technical support to customers and work with technical team and/or FAE for customer R&D projects.+ S# Z. }, p1 }; ~: D; y  J

2 V  q) u3 r- ?# T6 O职位要求:# L9 u/ I8 O  ]
Required skills and experience 1. 5~10 years experience in cellular radio system design or testing 2. Understanding of general RF and microwave principles including Smith Chart, multi-port S-parameter calculation, transmission line theory and impedance matching etc. 3. Knowledge of RF circuit analysis including filter design, noise figure calculation, amplifier (LNA/PA) design, oscillators and mixers, phase lock loop design etc. 4. A good knowledge in RF components, such as RF transceiver, SAW, duplexer, LNA and RF switch. 5. Experienced in lab hands-on test fixture and prototype making and impedance matching and tuning 6. Knowledge and experience in RFIC characterization and test, understand principles of RF calibrations and device optimization. 7. Experience and knowledge of GSM/GPRS/EDGE/WCDMA phone development process and RF performance DVT steps. Familiar with compliance tests for GCF/PTCRB 8. Familiar with RF testing equipments, CMU200, Agilent 8960, network analyzer, spectrum analyzer, and signal generator. 9. A good working attitude. 10. Excellent oral and written communications and interpersonal skills' able to function effectively in a team environment. 11. Master degree in Electrical Engineering with a specialization in telecommunications 12. Knowledge of RF system link budget calculation, wave propagation, antenna modeling and design is a plus.
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:51 PM
標題: ARM MCU Senior Hardware/Validation Engineer
招聘公司:A famous IC company
; s' J1 q/ m$ t工作地点:Shanghai
6 A$ V5 E% {, r$ H+ v( x- \; e岗位描述:/ _- f0 `, g2 z4 l- r& u- A( \+ U- X

/ ?" O9 `: m; l) ~  A* M* g5 x; t9 `Summary: The primary objective of this role is to perform hardware tasks for the XX 32-bit ARM-based MCU product line. This includes design and manufacturing of the evaluation kits, reference designs, and functional validation of the products. You may also be involved in AT91 products support. You will be located in Shanghai and will work in close cooperation with the product application team located in France. Key responsibilities/duties: 1.Perform tasks of AT91SAM product functional validation, including validation plan writing, validation software and scripts development, validation implementation and validation report composition to validate the products functionality, performance, robustness and characteristics. 2.Perform tasks of AT91SAM based reference design projects, including specification writing, system design, schematic capture, PCB design review, manufacturing follow-up, prototype validation, production test package development, and project management, to provide industrial turn-key solution to the customer. 3.Perform tasks of AT91SAM Evaluation Kits projects, including specification writing, schematic design, PCB design review, manufacturing follow-up, prototype validation, kits production test package development, and project management, to provide professional evaluation and development kits to the customer. 4.Provide professional technical support to other teams with dedicated test boards, hardware debugging, and critical issue investigation, etc. to take responsibility of hardware related tasks of the application team. 5.Participate in customer support of all the AT91SAM products, including hardware design review, debugging, and critical issue investigation, etc. to revolve all the hardware issues from customer. 6.Write documents including application notes, technical articles, project documents, user guides, etc. to provide documentations to the application team.: y; w% G4 G+ X: A& D# v
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职位要求:
7 s& j( L; U" r7 {' KRequirements (indicate “must” or “preferred”) Key skills & knowledge (technical): 1.Must have rich experience on ARM microcontroller based product functional validation, including low level drivers of ARM on-chip and on-board peripherals’ functionalities, MCU performance and characteristics testing such as power consumption and timing; skill in SOC architecture design is a plus. 2.Must have proven experience in embedded system design based on ARM microcontrollers, including system definition, schematic design (ORCAD), PCB design (Allegro), prototype testing, etc. 3.Must have proven project management skills and experience, including planning, tracking and reporting. 4.Must be self-starter with the ability to proactively propose technically competent solutions, shall like to be result-oriented and shall manage time efficiently. 5.Must have strong understanding of digital and analog electronics fundamentals. 6.Preferred to have embedded system design experience in metering and smart grid industrial. Metrology knowledge is a plus. 7.Preferred experience in high speed digital design and mixed signal design. 8.Preferred knowledge of signal integrity, EMI/EMC; proficiency in Allegro SI Board or HyperLynx, Allegro AMS. 9.Preferred working experience in international environment. Language skills: English fluent – conversation, reading and writing Relevant Experience: 1.Minimum 6-year experience for bachelor and 3-year experience for master in embedded systems development and/or SOC validation. 2.Experience of writing technical documents in English. Qualifications: Bachelor or Master Degree in EE Natural talents (innate competencies/behaviour): Rigor and method Reactivity, self initiative Keen on technical investigation, good deductive reasoning Detail-oriented and pursuit of excellence Work well in a team environment Good communication skill
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- e# ~/ \! _7 m1 s+ p能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:53 PM
標題: Analog Mixed Signal Design Engineer
招聘公司:A famous IC company4 J1 x/ u% I4 D3 E
工作地点:Shanghai: p9 b9 m: S, l) g# ^' ~
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岗位描述:. s$ ]( r1 w: z- f! j/ V
Job Summary As an Analog Mixed Signal Design Engineer you are member of one or our PMU product development teams that are defining and finalizing design solutions, from feasibility study to complete qualification and production. As a Mixed Signal Analog Design Engineer, you will be developing analog IP and analog blocks for energy & power management IC. These IPs are then integrated within IC & you play an important role in the mixed signal integrated circuits design. The role will cover the full IC design cycle from specification through to testing of engineering samples. Key Areas of Responsibility 1. Carry out development activities from design, verification to physical validation for mixed signal integrated circuits (Analog, power and digital blocks) for power management IC; - Accountable for proper execution (schedule) & quality of own design - Ensures integrity & documentation of own design 2. Interface with layout team, performing or providing guidance for layout design and controlling layout design and work quality; 3. Evaluate the product with application team to meet customer specification; 4. Debug product to fix incorrect operation and meet customer specification; 5. Works with a project leader to identify tasks and plans; Reports execution progress to support project management 6. Work with an architect to define block specification, simulation, verification and physical validation plan; 7. Work with other team members to build up design knowledge and improve way of working (Continuous improvement & Lessons Learnt) 8. Develop his/her leadership on his/her domain of skills and actions. -Innovations, technologies, methodologies,… 9. Coaches less experienced colleagues when needed or asked for.
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职位要求:
6 T* E  o9 H4 }+ r  O7 `Requirements 1. BSEE with minimum of 6 years or MSEE with minimum of 2 years analog design experience; 2. Experience designing any or all of the following: DCDC, Charge pump, LDO, amplifier and comparator; 3. Familiar with CAD tools and environments, i.e., design workstations and UNIX; Familiar with Cadence Spectre, Virtuoso Layout XL; 4. Experience in analog layout design and physical validation; 5. Ready to travel (multi-sites R&D developments) 6. Open in communication 7. Good command of English (multicultural environment); 8. Good team-worker with a pro-active attitude; 9. Experience in AMS Top Level Verifications is a plus 10. Experience in CAD support (CAD methodologies and tools) is a plus 11. Experience in PCB design, instrument and measurement, lab skills, and lab evaluation is a plus.+ L( O+ e3 @0 o) k6 _! y2 t' b3 M
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:58 PM
標題: ASIC P&R Engineer
招聘公司:A famous IC company
0 `  e, {& _; k! g$ E1 K工作地点:shanghai# |1 a  h2 L, J% B! X

( ~0 r9 @: r( L岗位描述:: C* |# y1 w( \) H0 r% ^* m  \
Job Description: In this role you will be responsible for chip/block level floorplanning, power planning, timing-driven place and route, congestion analysis and repair, clock tree synthesis, timing closure and physical verification (DRC/LVS). Perform circuit custom layout design and power planning.6 Y1 d; c  H5 D$ w, _$ A

# r& _/ [, M: t& @4 p职位要求:
) l( h( F9 _) M6 l5 V" Y9 _' c# { Job Requirement: 1. Experience in ASIC physical design (place and route, DRC/LVS, power distribution, etc.) 2. Be familiar with PR tools such as SOCE/Austra. 3. Be familiar with chip tape out flow. 4. Experienced in circuit custom layout design. 5. BS/MS degree in Electrical Engineering, or science related subject. 6. Good communication and teamwork skills.
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 01:59 PM
標題: Design Verification Engineer, Staff
招聘公司:A famous IC company8 `/ m, {/ t6 e  J& m4 j
工作地点:Shanghai
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, ^" ~5 v; [  z. V' O- R! c( \5 D岗位描述:
+ s9 n- d( X3 R2 c) iJob Function This DV Manager will be part of a team working on the future integration of complex SOC and switching product. The successful candidate will play a key role in driving many of the key DV architectural and in depth technical aspects of various projects and perform the following duties: - A multidisciplinary function, working in close collaboration with the design engineering teams and managers and directors on the various efforts involved in the definition and implementation of various projects and scoping development efforts and project schedules. - Responsible for the overall chip verification, in addition to the possibility of direct responsibility for the architecture of specific IP blocks or functions, depending on any specific area of expertise the candidate might have. - Interacting with and guiding a wide variety of internal and external design verification development teams, DV methodology, silicon IP and tool vendors. - Work with senior management, architects, and the design and DV teams across sites to contribute in definition of ASIC products specifications, feature definition and architecture.
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$ m, b9 S! G! _  R2 b8 I# G; J职位要求:
4 ]' f# U  Z/ X$ XSkills/Experience - 10+ working experience in the field of design verification, experience in networking or switching design is a big plus. - 3+ years as DV technical lead/architect or manager position. - Proven experience of the latest design verification methodology such as OVM, assertion based coverage driven verification (code & functional coverage), constraint random test generation, formal checkings, power verification, modern design verification tools and languages (e.g. PSL/SVA, SystemC++, SystemVerilog, Vera, Specman, simulation systems) - In depth experience in use of SystemVerilog and OVM to drive testbench is highly desirable - In depth knowledge of ASIC design fundamentals from RTL to GDS including DFT verification. - Experience in power verification is a plus. - Proven debugging and problem analysis skills. - Strong documentation and communication skills. - Good people and project management skills including scheduling, resource allocation, risk assessment, matrix management, and process development and organized and methodical with proven ability to plan and execute project. - Ability to work well in a dynamic, fast-paced, pressure filled, across multiple sites North America and Asia - Flexible in terms of responsibilities and hours. Education Requirements MSEE or PHD in EE or CS
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4 m' l) n5 E! H$ Y4 Y9 T0 W能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:00 PM
標題: Digital Verification Engineer
招聘公司:A famous IC company5 Z  [, Y1 l7 ~# X  p
工作地点:Shanghai# b9 Q/ C- ]2 D+ x3 B4 m
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岗位描述:; F7 _  Q) ^+ f( L* W
Job Function
- q4 d, }" M# J' a$ l& E# ]! i-Develop reusable block-level and system-level ASIC testbenches using Systemverilog
( O" i( E) e% p( Y7 u* D-Develop SOC verification environments to support ASIC development. 3 w: H# x4 f. ]# D. a# W4 P. q
-Maintain existing ASIC verification environments.
* h3 F5 }7 G$ x5 w  ]3 r-Define and develop application tests required to verify ASICs meet functional and performance goals.
3 E) F/ o1 R1 W-Define and implement functional/code coverage plans. ) {9 H/ O( E! a; h' H- e
-Develop testing and regression methodologies for new verification flow.
2 i/ K  t, h- C8 f-Develop/maintain/enhance environment tools/scripts/makefiles.
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* J7 ~$ d. v- ]9 Y# e7 x$ v/ P职位要求:  _1 v9 k# e) X" _7 O7 Z" S
Skills/Experience
: M" T% a$ L! |& E3 to 5 years of applicable work experience
6 s% {2 G/ K8 o0 U-Minimum of 5 years ASIC Verification experience in a product development environment ( j* H! A8 @; p" m# _: x! G+ a6 J
-Proven ASIC Design Verification skills , g% v( l; |0 B
-Rich experience with Vera/Specman E or SystemVerilog
. m0 t( D. W: N3 i0 L-Digital verification experience on MIPS CPU/AXI/DDR Controller 4 s6 a8 t& ]9 k. L1 C9 `0 X) Z8 J9 _( ?
-Knowledge of data and telecommunication networking(IP/Ethernet)
0 T" g7 L* y5 d7 c' [4 M-Experience with one or more scripting languages: TCL, Perl, python
# y. V- C. A/ }- {+ O- C' x-Superior debugging skills for large ASIC designs ! }, N" h! H! }0 m0 l
-Strong written and verbal communication skills
0 V& C( F3 _+ p- q1 r! U-Adaptable to evolving customer requirement
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4 P' R5 A% i8 p- w* }7 c# y% I4 {Education Requirements : t7 i1 y+ j7 o9 M
BS/MS degree in Electrical Engineering, Computer Science, or related field ( q. f4 Y2 j& F
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:02 PM
標題: Signal Integrity Product Engineer
招聘公司:A famous IC company8 I3 X1 S' T0 `5 I
地点:上海
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2 M& k2 Y9 A' `4 I7 z1 hJob Description - q- \; P9 p* e) w$ ?
Working closely with both RD and Application Engineering teams and responsible for defining and supporting IC-package-PCB power and signal integrity solutions including product specification, technical marketing and carrying out customer evaluation, benchmark and support ! y% X7 X5 b5 ?9 \- c% q2 n
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Qualifications
: a; o+ ~0 a8 y; pProficiency with high-speed I/O (DDR) signal integrity
, \  P0 n0 [1 w! l. q# I% [Fluent in HSPICE/Spectre/Eldo transistor level circuit simulation for IO noise and timing 5 _$ q% ^6 U' z* n  d# J4 A  p
Knowledge on die and IO ring physical design, LEF/DEF/GDS . @5 p7 J5 N3 h6 q4 n7 q" }
Self motivation, teamwork and strong English communication skills (both written and oral) 5 y; A9 g6 Y- K; W% W; C
M.S. or Ph.D. in Electrical Engineering or other related areas8 B/ S2 G. K" l; }& h; c% Q
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:03 PM
標題: Software Developer – IC Physical Design Database
招聘公司:A famous IC company
4 z4 l5 M  i9 `, G4 j工作地点:Shanghai/ c6 K. l: E& C; F$ {

, D" ?9 i$ b( t: D岗位描述:
. M/ `- X7 T4 f5 D) cJob Description Develop and maintain the IC design database for IC-package-PCB power and signal integrity solution! F: l: i  t5 k8 @
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职位要求:
5 q0 i+ G4 R9 B4 D, d  MQualifications Strong C/C++ programming experience in Linux Experience with the algorithm and implementation of large data parsing, handling and processing Experience with IC placement and routing including LEF/DEF/GDS data is required Experience with SPICE simulation is a plus Excellent verbal and written communication skills M.S. or Ph.D. in Electrical Engineering, Computer Science or other related areas : h4 w0 ~/ C: l* K# w

" |7 B2 e( @% g能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:04 PM
標題: ARM eMPU System Senior Engineer
招聘公司:A famous IC company* E2 Y1 r! j- Z* ]
工作地点:Shanghai" x& g0 K* i! D0 i. P

: I: \+ Q; V0 T: \2 Z) l岗位描述:
* `- k9 p1 N' T4 v+ kPurpose: The primary objective of this role is to specify, document and work on the ARM eMPU (embedded MicroProcessor Unit) products and various offerings in Shanghai Design Center (SDC). This position is also required to support early customers on the new ARM eMPU products. The ARM eMPU Systems Team is part of the ARM Applications Group, with the role to specify and document the ARM-based embedded microprocessors and related offerings that are destined to the customers. The ARM eMPU products may embody crypto functions, secured boot loader and/or other secure features, or may specifically be designed for secured applications such as point of sales (POS) terminals or smart meters and secured data concentrators for Smart Grid applications. The roles of the team also include product datasheet/application note composition, product development follow-up, key customer support, reference design integration, and marketing support for product promotions and product introductions. Key responsibilities/duties: 1. Work with the marketing team and the design team in the eMPU product feasibility stage and convert the marketing requirement documents (MRD) into product functional specifications. 2. Define the eMPU product related offerings (in form of tooling plans), including but not limited to benchmarks, application notes, evaluation kits, development platforms, reference designs, software packages and frameworks/stacks, development tools and programming tools, (real time) operating systems porting, etc. 3. Document the eMPU products and deliver the advanced datasheets, preliminary datasheets, and final datasheets. Document system level application notes. Document the errata when necessary. 4. Coordinate the New Product Introduction (NPI) projects of the eMPU products within the Applications Groups. 5. Support the early customers on the new eMPU products. Train the Support Group on the new eMPU products. 6. Define and work on system level projects around the eMPU products, including development platforms and reference designs, especially for the applications in the strategic market segments. 7. Communicate with the eMPU Systems Team in France for solving issues. Position reports to: Directly reports to the ARM eMPU Systems Manager in SDC. Titles of position that report to this position: None. Key relationships / interfaces: Internal - Product Marketing Team, IP nd Design Integration Teams, Support Team, Product Engineering Team and other teams within the Applications Group. External - Key partner and early customers. # j9 Q8 V( }+ ^/ ]: F$ B
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职位要求:) M4 U/ `% J, i$ m. l+ i3 H
Requirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have experience in developing the ARM-based embedded systems, including hardware and software. Related customer support experience is a plus. Experience in specifying the ARM-based eMPU SoC at system level is a big plus. 2. Must have experience in working with different functions at multi-levels. Experience in project management is a plus. 3. Must have the ability to communicate effectively with multi-levels of internal and external interfaces. 4. Preferred industry experience in semiconductors and/or embedded systems solution providers. Preferred multi-national company (MNC) working experience. 5. Knowledge and experience of cryptography (SHA, DES/AES, RSA/DSA, etc.) and secure products development is a plus. Language skills: o English, fluent conversation, reading and writing. o French, would be appreciated, but is not a must. Relevant experience: Minimum 5-year experience in embedded systems development. Qualifications: Bachelor above degree in Electronics Engineering or related; Master degree preferred. Natural talents (innate competencies/behaviors): High sense of accountability Sense of leadership Passion for people development Team and project management skills Ability to manage conflicts Detail-oriented and pursuit of excellence Reactivity, self initiative Customer-friendly . B  J9 }/ a& B/ }7 m2 K) {0 O4 @

: P, p& v5 ?$ h7 ]4 s0 v5 }能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:05 PM
標題: ARM Flash MCU System Senior Engineer
招聘公司:A famous IC company" W, _. y/ F7 R6 ?" {0 f" [4 j3 @
工作地点:Shanghai4 I/ v* \3 j+ q* m" G* u8 t
! Y6 A" y% \' _. |* d2 c
岗位描述:6 w$ M2 s  t/ `* F% T+ c* `! P4 f
Purpose: The primary objective of this role is to specify, document and work on the ARM Flash MCU products and various offerings in Shanghai Design Center (SDC). This position is also required to support early customers on the new ARM Flash MCU products. The ARM Flash MCU Systems Team is part of the ARM Applications Group, with the role to specify and document the ARM-based flash microcontrollers and related offerings that are destined to the customers. The ARM Flash MCU products may embody crypto functions, secured boot loader and/or other secure features, or may specifically be designed for secured applications such as point of sales (POS) terminals or smart meters and secured data concentrators for Smart Grid applications. The roles of the team also include product datasheet/application note composition, product development follow-up, key customer support, reference design integration, and marketing support for product promotions and product introductions. Key responsibilities/duties: 1. Work with the marketing team and the design team in the Flash MCU product feasibility stage and convert the marketing requirement documents (MRD) into product functional specifications. 2. Define the Flash MCU product related offerings (in form of tooling plans), including but not limited to benchmarks, application notes, evaluation kits, development platforms, reference designs, software packages and frameworks/stacks, development tools and programming tools, (real time) operating systems porting, etc. 3. Document the Flash MCU products and deliver the advanced datasheets, preliminary datasheets, and final datasheets. Document system level application notes. Document the errata when necessary. 4. Coordinate the New Product Introduction (NPI) projects of the Flash MCU products within the Applications Groups. 5. Support the early customers on the new Flash MCU products. Train the Support Group on the new Flash MCU products. 6. Define and work on system level projects around the Flash MCU products, including development platforms and reference designs, especially for the applications in the strategic market segments. 7. Communicate with the Flash MCU Systems Team in France for solving issues. Position reports to: Directly reports to the ARM Flash MCU Systems Manager in SDC. Titles of position that report to this position: None. Key relationships / interfaces: Internal - Product Marketing Team, IP nd Design Integration Teams, Support Team, Product Engineering Team and other teams within the Applications Group. External - Key partner and early customers.
5 |8 M3 n8 j# R4 U7 m2 x7 E
6 c7 M, g/ b7 e0 v3 Z职位要求:. o! U0 c1 g2 g% \; X* h/ A% J
Requirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have experience in developing the ARM-based embedded systems, including hardware and software. Related customer support experience is a plus. Experience in specifying the ARM-based Flash MCU SoC at system level is a big plus. 2. Must have experience in working with different functions at multi-levels. Experience in project management is a plus. 3. Must have the ability to communicate effectively with multi-levels of internal and external interfaces. 4. Preferred industry experience in semiconductors and/or embedded systems solution providers. Preferred multi-national company (MNC) working experience. 5. Knowledge and experience of cryptography (SHA, DES/AES, RSA/DSA, etc.) and secure products development is a plus. Language skills: o English, fluent conversation, reading and writing. o French, would be appreciated, but is not a must. Relevant experience: Minimum 5-year experience in embedded systems development. Qualifications: Bachelor above degree in Electronics Engineering or related; Master degree preferred. Natural talents (innate competencies/behaviors): High sense of accountability Sense of leadership Passion for people development Team and project management skills Ability to manage conflicts Detail-oriented and pursuit of excellence Reactivity, self initiative Customer-friendly 4 Y+ n( E; i# y
- T) b3 P& T. W7 i4 x
能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:08 PM
標題: ARM MCU Senior IC Design Engineer
招聘公司:A famous IC company$ H. w" m) [9 c
工作地点:Shanghai
" L6 {  W  n# a0 ?* K7 Z5 k6 Y  M
( o; N- V# z3 R; |3 ~- u; F) Z. y岗位描述:
: L/ ^" a0 c/ }7 g6 R( `Purpose: Working in ARM MCU design team under Shanghai Design Center (SDC), the primary objective of this role is to implement design integration for the 32-bit ARM-based MCU product line, as a senior team member. The role of ARM MCU design team is to perform the system-on-chip (SOC) design integration tasks for the 32-bit ARM-based MCU product line, collaborating with the main body of design teams in France. The role of the team may also include marketing feasibility study, application group support for design specification and datasheet, product engineering support for testing and characterization, IP design group coordination for customized cell development, and so on. Key responsibilities/duties: 1. Participate in the development of products. 2. Help the manager to manage the projects, follow up and report progresses, assist and coach others technically if necessary. 3. Participate in the communication with the IP and design teams in France for defining the tasks and objectives, reporting achievements and solving issues. 4. Participate in the collaboration with various internal teams for feasibility; product specification and datasheet; library development; product test, debug, and characterization, place & route. 5. Work with external licensers, IP providers and design service providers to efficiently complete the design projects, when necessary. Position reports to: Shanghai ARM MCU IC Design Manager Titles of position that report to this position: None Key relationships / interfaces: Internal - Design and Core/IP teams in Francemainly, but also other teams in France and Shanghai External - Core licenser (ARM), I providers, design service providers
7 t8 N" y& c7 I. ]8 e. s) h5 p! r8 Z; |* b# s
职位要求:
6 M) W! D7 a. U8 @4 I& T- z! Q6 g( zRequirements (indicate must or preferr) Key skills & knowledge (technical): 1. Must have a strong experience in some phases (all phases preferred) of SOC development, including RTL coding, RTL simulation, synthesis, STA, formal proof, design for testability (DFT), design for manufacture (DFM), and post-layout simulation. 2. Must have a proven knowledge and experience in microcontroller architecture. Knowledge and experience in AHB/AXI, ARM microcontroller especially on Cortex cores is a plus. 3. Must be very familiar with Cadence and Synopsis design tools. 4. Must have a proven record in successful SOC design project as a key member. 5. Must have a strong passion and motivation to develop career in embedded SOC design track. 6. Must have the ability to communicate effectively with internal and external interfaces. 7. Must be self-starter with the ability to proactively propose technically competent solutions, shall like to be result-oriented and shall manage time efficiently. 8. Preferred multi-national company (MNC) working experience. Language skills: o English, fluent conversation, reading and writing o French, would be appreciated, but is not a must Relevant experience: Minimum 4-year experience in product (ASIC or Microcontroller) development. Qualifications: Bachelor degree in Microelectronics or related major; Master degree strongly preferred Natural talents (innate competencies/behaviors): High sense of accountability Rigor and method Reactivity, self initiative Detail-oriented and pursuit of excellence Work well in a team environment Good communication skills ; s/ ]0 m% A# Z: {2 u8 H5 c
/ b; G' p! Q9 g( e2 @$ |  w) r
能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:11 PM
標題: Senior Analog Design Engineer
招聘公司:A famous IC company
& H* a! p9 m% q3 f8 t, V/ w1 K工作地点:Shanghai6 t# M% E' f# R; _
3 h% Q. X0 I- i9 H2 R; T* W* W
岗位描述:
) {1 M7 b4 S, n$ k! w- H; u* D5 LJob description The candidate will be responsible for CMOS analog circuit schematic design, layout design, IC test and debug for analog design such as CMOS ADC/DAC, LDO, DC-DC converter or charge pump etc. Responsibilities -Design analog block circuit meeting the system requirements -Analog block circuit layout and post-simulation -IC test and debug -Documentation and report about the designed circuit blocks 5 p; t+ W: o( H0 o

4 S4 R& E6 S0 i" ^' o0 Q职位要求:
" M7 G! f; L+ C' kQualifications -BS or above, Electrical Engineering -5 years or more industry experience is must -Tape-out experience is a must -Strong knowledge about CMOS analog circuit design -Knowledge about bulk CMOS process -Familiar with Cadence tools including Spectre, SpectreRF, Ultrasim, Virtuoso, and Calibre LVS/DRC/PEX, etc -Familiar with spectrum analyzer, oscilloscope etc -Familiar with Matlab, Simulink is preferred -Good English communication skills -Self-motivated emphasis on teamwork, schedule, plan and delivery ) S8 P; e! f, X4 Y6 ~( x
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能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:12 PM
標題: Wired System Architect
招聘公司:A famous IC company
- s- p- X( c% r. F0 ~1 ?工作地点:Shanghai7 e1 ^0 O' g& E6 Z
! B: Y$ Y* n7 A8 n
岗位描述:5 b. F! d: V% E& ^9 U
Role This person will be the lead “define market and/or application” system architect within xx and will drive our product definition and application platform strategy to ensure successful penetration of the market.  Specific Duties: – Support development of the strategic plan for the business: • Application platform strategy & roadmap • Ecosystem partner strategy & roadmap – Drive the creation and execution of high value products: • Create long-term architectural level relationships with the technical experts who design and influence the evolution of the target application at both customers and customer’s customer. • Drive product definition sessions with key architects at target customers. Ensure application/market requirements drive product technical specifications. • Drive feasibility assessments and recommend/review/approve product definitions with PM, TME, and other relevant groups, as applicable. • Technical lead w/ identified ecosystem partners for the business. – Drive unique and compelling value into the application roadmaps and product definitions for silicon and IP (both horizontal and market specific). – Support the execution of Business Development strategies for the target application/market: • Contribute to Sales account penetration plans. • Define prioritized Design Win targets. • Provide systems architecture and solutions support for sales efforts. • Lead technical response (architectural proposal) to RFQs and RFPs. • Support system-level design-in applications collateral - articles, demos, technical keynotes, panel presentations, and trade show support. – Deliver platform-driven design wins at target customers. – Demonstrated technical output: • Patents and trade secrets (as appropriate) • Participation in industry conferences, workshops, panels, standards committees, etc. • Journal articles (include Xcell Journal), applications notes, and white papers • Articles in industry publications • Mentoring of other employees • FPGA based Architecture White Papers0 s3 _. x2 W, Z! z6 O

$ K2 B6 ]8 M3 V* H0 N  C- k9 j) m# Y: a职位要求:8 `% j; Y$ C7 [# U3 j% Q2 [
Requirements • BSEE or MSEE equivalent • >7 years experience in Systems Engineering or Hardware Architecture of Telecommunications or Data Communications Systems • Knowledge of OTN and PON standards, applications, and hardware architecture • Knowledge of Carrier Ethernet and Data Center standards, applications, and hardware architecture • Able to cover topics from network level architecture down to RTL level inside an FPGA • FPGA architecture and implementation experience • Excellent oral communication skills • Bi-lingual Mandarin/English Speaking • Self-starter, comfortable working and able to provide results in an unstructured environment and reporting in to a remote manager • Customer interface experience is a plus
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# D* w5 J0 U* m能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:13 PM
標題: System DSP Engineering
招聘公司:A famous IC company, V0 \4 D0 d$ _2 K# S9 F  K
工作地点:Shanghai/Wuxi
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4 x3 k7 s, I$ L0 L/ U; ^! P2 r岗位描述:; a  i, W3 Q( W# l! n- ?. f' z! q
In the position of DSP/System Engineer, the candidate will 1. Work on implementing new algorithms and techniques for wireless communication systems. 2. Work closely with the senior system engineers in implementation, optimization and design of complex algorithms and integration of the system. 3. Must be able to conduct C/Assembly coding of DSP functions, system design, performance optimization and architectural trade-off for hardware and software implementation.
: x; f5 M' W1 w- t4 P  @/ j# O7 b6 E: r) v6 I, \- d
职位要求:, Y- v+ x% w: C- o; w! L2 I) e
Ideal candidate for this position will have 1. In-depth knowledge of wireless communication systems with specific knowledge of DSP and C programming. 2. Must have strong competency in communication and signal processing algorithms and understand DSP architecture. Requires MSEE or PhD with 3+ years of experience.
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; f0 q) ~$ ~7 {, ?* }+ k& `能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-15 02:15 PM
標題: System Engineering
招聘公司:A famous IC company; }: l0 v. `0 K% N
工作地点:Shanghai/Wuxi
* ^1 R. |8 S& q6 a+ A  C" [! ?
, S) o. W* r- ~6 q3 M2 ~0 X7 m岗位描述:7 z2 j+ Z6 o; n% m! y9 _5 t. a
In the position of System Engineer will work on 1. Developing new algorithm and techniques for wireless communication systems. 2. Work closely with the senior system engineers in design and simulation of complex algorithms and integration of the system. 3. Specific tasks will include design of sphere decoder algorithm, its simulation and optimization and working closely with ASIC and FPGA team in hardware implementation and verification.
& c5 J, R( q- }2 U, r9 Z' A5 D- Y: e% X% ]8 M. u+ s( C5 N. q4 x
职位要求:
& @( b- z& @  [; \( e* sIdeal candidate for this position will have: 1. Good knowledge of wireless communication systems with in-depth understanding and direct experience in MIMO signal detection and sphere decoding. 2. Experience in maximum likelihood decoding and detection and their efficient implementation. 3. Must have strong competency in simulating complex communication and signal processing algorithms in MATLAB and C. 4. Knowledge of ASIC/FPGA design, fixed point operation and lab equipment a plus. 5. MSEE with course work in communication and signal processing required with 2-3 years work and/or research experience.
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2 F& o: ^7 ?7 k, s# C能者與意者請 email resume 與chip123聯絡。
作者: ranica    時間: 2011-7-28 11:42 AM
招聘公司:A famous IC company
: J- d0 d: n  T: x0 j招聘岗位:IC Architecture Design Engineer
7 e! A. `) n% D) {6 B" h9 M工作地点:shanghai
2 j1 P$ L6 O. J% ^% l% D4 W# z
+ p8 v' d% E6 ?3 U# N4 Y! \7 K; o岗位描述:JOB SUMMARY 工作概述
0 x9 Q1 ?! _( R2 h. V8 G) YResponsible for architecture defining and C-modeling on 3D graphics blocks for the next generation of STB/IPTV/HiDTV products;
- j+ N# w& J% w1 W  L4 g2 w. F& ?
; M1 d7 [9 \; {( X8 QESSENTIAL DUTIES & RESPONSIBILITIES 主要工作内容和职责 ) n) D2 y9 k$ B  e# ^5 ]
Do 3D architecture design, C-modeling, test plan and hardware verification of the assigned graphics blocks;% @5 d. e, j- \) Z/ l0 _
1 t* H( I# `/ G, J, h' b
职位要求:
2 a* O! C) `" L& g- A" aJOB QUALIFICATIONS 岗位要求
" I& B# {' l3 z3 ?1. Education / 教育背景:
& @6 P' a* J) G" gMaster degree or above. 硕士或以上学历
5 U1 {9 V* z6 Omajor in CS, EE, or related;
. ^$ M% G% b! ~0 U/ G7 u 2. Experience/工作经验:' r( F+ C' g9 \: F: d! o8 `3 B
Have working experience on hardware c-modeling, 3D graphics driver, and/or 3D graphics application;
3 X/ k: |$ P# i3. Knowledge of/Skills and Abilities / 知识掌握/技术及能力:7 h' Q3 W  F" s& `% t
Be familiar with hardware c-modeling and have 2 years hands-on experience on c-modeling of the 3D graphics engine; 8 C# c5 F; s& k
Have good skill in C/C++ coding;
' ?9 v  P- w" T5 P# \' L! f0 `& JHave strong hardware knowledge of computer graphics, OpenGL, and/or other 3D standards;   r0 n- O* f5 k" _# L
Knowledge of computer architecture and logic design is required;
2 L) ]' Q' s# M9 z, Y+ NKnow-how on Verilog or other HDL language is preferred. . g2 K: Q0 A5 ?4 j
4. Others/其它:
) |# f) {$ t$ u% U/ S; C3 w+ T  W* `% q4 G# z$ `! w
EQUIPMENT USED 需要使用工具 * ^: k7 U3 P7 z: y& I8 r8 B
1. Be familiar with UNIX OS or Linux OS;- m! S- g5 z9 ?6 ]
2. Good skill in script languages, such as perl, tcl, python etc
作者: ranica    時間: 2011-7-28 11:45 AM
招聘公司:A famous IC company4 I. ]3 m3 X  p! v
招聘岗位:Analog Design Engineers* \( _. M) H& j9 J3 s; ^7 v7 m1 b
工作地点:shanghai
6 M) [: z" Y' U$ e+ |7 y4 T0 V5 S8 z/ y' e* c8 H  {$ u
岗位描述:
! T  _! M! K0 ?' yResearch, definition, design, simulation, layout supervision, characterization and release to production of high-performance state of the art BICMOS, video integrated circuits. The integrated circuits will typically include the following blocks:
5 u3 @/ t5 z3 M  c, [! y' @5 z8 ?3 K! F- U1 B% Q
Video Amplifiers 3 H0 m+ u$ y2 e: m, g
DC-to-DC converters, LDOs, PORs
" }( |( S& X. ZInterface Circuits –SPI, I2C, LVDS, … ; v& y+ h( x7 d, ?* ^$ {3 A
Bandgaps and references
  E" ]* ^* \: q) X7 X$ R* q; lVoltage monitors ( e& s1 u# h- W) G& J6 ]6 H
Analog-to-digital and digital-to-analog converters+ U  y) C- w* w* D+ }1 W

: }4 J- C( P# [职位要求:Job requirements -
0 Q* }9 \4 e- g" ]' J; v0 M' Z! y# ?$ G8 G  H- v
MSEE degree, with at least 1+ years of design experience.
) o4 Z! n" R3 d8 H( K4 E# KHands-on design experience with BiCMOS/CMOS mixed-voltage custom circuit designs
# W+ v% P3 \6 g) r8 XMust possess strong intuitive and analytical understanding of transistor-level design and simulation
, K3 W* ~& V4 AMust understand placement and layout issues with respect to mixed-signal IC’s / M  K, `. q$ `2 ^! D
Must be familiar with Cadence mixed signal design flow. 4 \) j. q9 U4 w% z" H
Good English communication skill
作者: ranica    時間: 2011-7-28 01:50 PM
招聘公司:A famous IC company
& {1 {- t3 G3 p8 J1 p- K& H招聘岗位:China Audio Design Engineer
: p* E+ Y+ I  S! ?工作地点:shanghai8 I3 Z: w) B9 }6 ~8 y- _+ l/ m

5 D0 E! r9 X- w岗位描述:
0 j6 E0 P% |0 W$ c7 VThe Audio design group in Shanghai, China is aggressively seeking analog / mixed-signal integrated circuit designers with extensive experience in these product areas:
$ @2 A& C( P# X. C9 X; p; o- [* w- uØ Class D Amplifiers
, K. ]- X1 @3 rØ Class AB Power Amplifiers (20mW to 5W)
( d8 ]% ]1 f- |( _  m5 C- hØ Low-Noise, Low-Distortion, Micro-Power Amplifiers" ]3 |4 T. D4 l9 I, Z

& f* o  [4 y5 i. q6 wYou will be joining fast-growing business unit that is selling audio ICs to the top consumer electronics companies in the world. ; ?' @! L; `+ N( Y+ t
Working side-by-side with the highest-caliber analog / mixed-signal and digital circuit designers, you will have the opportunity to see your creative skill result in commercially successful products.
作者: ranica    時間: 2011-7-28 01:50 PM
We believe that our engineers hold the key to XX's future. We recognize and reward their achievements generously by offering a competitive compensation package that includes salary, bonus, and stock.
! {' g( h3 X9 s- n3 z0 R" B" q# |6 g% _$ G% _0 f) z  q. W
The successful candidate will have extensive background in two or more of the following areas:
3 R. W. i8 ^7 d% L2 w" Q- u- jArchitecture and Verification of large mixed-signal systems
, D& M5 g0 k; J$ m' O3 D8 vSigma-Delta A/D or D/A design
; G: e& B9 r' p- lHigh-Performance (low noise, low distortion, low voltage, low power) Audio Amplifiers 0 {( W( |% Q* y+ }0 U
Power Audio Output Amplifiers (Class AB / Class D / Class G)   f2 A# U1 [" D: h
Bipolar and CMOS analog design experience+ N3 l# @$ Q  t% H, u. Q1 V

! G0 H1 f8 Q( \3 c: B职位要求:Positions Immediately Available:
3 u, g$ _8 ]) n6 I7 D4 u% [+ A1 I: RNew College Graduates
4 B% R1 o% }: p" ~& q+ AMSEE required. No industry experience necessary.2 o$ i/ s/ F: ~; K/ Z( j
Analog and Mixed-Signal Design Engineers
3 a5 F$ X( T& X* _' l- x3 @! tBSEE + 3 years of relevant industry experience or a MSEE required.
2 b5 P- Q0 q: y. e+ }& `Senior Analog and Mixed-Signal Design Engineers
0 J1 o+ ?* F8 B- l0 x* m; T9 VMSEE/Ph.D. + 7 years of relevant industry experience
作者: ranica    時間: 2011-7-28 01:52 PM
招聘公司:A famous IC company
3 [7 D5 T6 a% e/ f- E1 `4 Z招聘岗位:Staff/Senior / Design Engineer ( Memory)# ?6 J% J. E6 Q4 N9 H' C, P$ J- Z
工作地点:Shanghai
" K) z% K, E% q) H: o
1 G: u4 ^$ J2 S! B岗位描述:Job Description and Responsibilities:
7 o" X) W( v& u) X-Responsible for analog and logic block design in the memory products. % W1 Y) r: J- G- ?3 K4 W
-Responsible for the developments of non-volatile memory products and flash macros.2 \3 g$ F1 {# c8 s: \3 e$ S

: W+ _8 C9 i4 U# W1 Y6 s! d职位要求:
) L! ?* s+ `& C8 ^; kKey Competency Requirements:
. R1 @- j* k5 k( @3 g; D* C( _-Technical knowledge in IC design methodology.
& ^; F" t" e7 Z" t7 |; O; e-Knowledge of non-volatile memory, analog design, noise analysis, low power/leakage, high-speed memory design a definite advantage.
1 y* y& G+ R9 I-Tools used may include HSPICE/HSIM, Cadence Design Entry, IC layout tools, or other equivalent tools.
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% Y+ C; _) R0 j( P, Z  s$ u' gEducation and Experience Required:
! f3 F- S, a5 M) G( @0 {1 B-Education Required: MS. EE or Ph.D. EE required;
7 V6 m1 E, p  I4 a4 M1 x-Experience Required: 3+ years memory or analog design experience;
1 E- g$ M% s; |2 \-Advantageous with experiences or exposures to the following: as project or team leader, test, package/assembly design and digital/layout design.
作者: ranica    時間: 2011-7-28 02:13 PM
招聘公司:A famous IC company
" r- q+ Q% N, ]: u% W- `9 p招聘岗位:ADC/DAC Designer( r2 T( c& K; g* X
工作地点:Beijing( S2 R, I6 v' h

( O4 P2 r0 ?4 H7 `. X8 V职位要求:8 e  p, r9 Z1 q$ F9 m- d
a) 具有成功的AD/DA设计经验,有成功的Pipeline AD,SARAD实际产品开发经历者优先考虑;
- {2 ^6 S+ r/ S% F! E5 z9 A. X$ Yb) 对AD/DA的各种结构,设计方法和校准算法了解深刻,
( U' [4 k3 }: g) y, ac) 熟悉CMOS工艺,有180nm及以下CMOS工艺开发经验;
2 @' W: c  n$ b9 f9 G! sd) 可独立承担开发任务,有GSM, WCDMA, LTE,TV Tuner,WiFi,WiMax,MIMO等系统的背景知识; 8 A4 N% K/ }6 Y; ~! K% V/ I' ]
e) 博士毕业,硕士毕业两年以上工作经历或优秀的硕士毕业生;
3 V( ~" Y! q. w/ p" m& A' Sf) 良好的沟通能力和团队协作精神;
作者: ranica    時間: 2011-7-28 02:13 PM
招聘公司:A famous IC company
/ z, ^# ]: J  Z% _: w' o招聘岗位:PA Designer
- p3 o% G. [# Y8 N) b6 T5 O工作地点:Beijing- [5 g7 q' T: q8 C5 H

$ D+ O3 k5 c7 o6 {职位要求:
7 `; J/ {2 g5 F, a8 i3 y/ ]; pa) 具有成功的PA设计经验,有两款以上实际产品开发经历者优先考虑;
8 [: ^) W2 E: r* k0 O! {% m6 P3 Xb) 熟悉CMOS/SiGe/GaAs等工艺 5 f3 q" U3 K! h8 |3 q+ S
c) 熟悉PA的各种结构和设计方法, 有Class A/Class AB PA 开发经验,了解PA预失真数字/模拟校准方法
5 x! T8 X" m- Y! b* Xd) 能独立开发产品,了解GSM, WCDMA, LTE,TV Tuner,WiFi,WiMax,MIMO等系统和相关系统的PA设计;
% h' l0 w2 M8 Ue) 博士毕业,硕士毕业两年以上工作经历或优秀的硕士毕业生;8 Q3 `# Z* r  X* i7 |* p
f) 良好的沟通能力和团队协作精神;
作者: ranica    時間: 2011-7-28 02:14 PM
招聘公司:A famous IC company9 W3 h( S, G# ~. C, T/ K5 b
招聘岗位:PLL Designer, C: O$ [( W. l4 t. J
工作地点:Beijing' G2 Z7 I( y4 h' X1 e! `
$ t. @: C& H, l8 {
职位要求:$ R: A3 D% ~4 A" B5 m* z# x
a) 具有成功的PA设计经验,有两款以上实际产品开发经历者优先考虑; . q% I3 ]8 z# e
b) 熟悉CMOS/SiGe/GaAs等工艺
1 A6 v, ?9 d) E1 kc) 熟悉PA的各种结构和设计方法, 有Class A/Class AB PA 开发经验,了解PA预失真数字/模拟校准方法 0 ^4 j7 c2 `! n: _8 d
d) 能独立开发产品,了解GSM, WCDMA, LTE,TV Tuner,WiFi,WiMax,MIMO等系统和相关系统的PA设计;
9 Z9 j6 q; J2 U# Qe) 博士毕业,硕士毕业两年以上工作经历或优秀的硕士毕业生;
) s( @) [: ^1 `) O( R1 H% of) 良好的沟通能力和团队协作精神;
作者: ranica    時間: 2011-7-28 02:14 PM
招聘公司:A famous IC company
5 k; `6 L7 U0 _+ c* R* ^. _' q/ g$ P招聘岗位:RFIC Designer3 L! e$ K, r; z! V
工作地点:Beijing
. K/ Y, E0 c7 z. r/ a
$ G1 D5 _; z8 B. a4 M职位要求:) b  `. ]- z) Y. W5 ^5 v8 P
a) 具有成功的PA设计经验,有两款以上实际产品开发经历者优先考虑;
, s, I6 g8 {: U* sb) 熟悉CMOS/SiGe/GaAs等工艺 + G4 g/ K% Z2 R! @" E4 z( K
c) 熟悉PA的各种结构和设计方法, 有Class A/Class AB PA 开发经验,了解PA预失真数字/模拟校准方法
# R. }$ h+ N4 B4 }1 }d) 能独立开发产品,了解GSM, WCDMA, LTE,TV Tuner,WiFi,WiMax,MIMO等系统和相关系统的PA设计; 1 n5 \6 V% W9 R1 s* y
e) 博士毕业,硕士毕业两年以上工作经历或优秀的硕士毕业生;
, B* C! q& L; i& lf) 良好的沟通能力和团队协作精神;
作者: ranica    時間: 2011-7-28 02:15 PM
招聘公司:A famous IC company
0 Y" @+ \) x/ e( x4 L. V) M( w招聘岗位:power ic + i- C- E+ Q$ z' P
工作地点:Shanghai; u  e5 v2 S0 L) j3 w- Z
5 N, c' f( o6 ^6 t" D
岗位描述:; @0 m% H5 b- B
1.0 工作内容 1.1 根据本部门制定的研发计划实施产品开发、研发工作,制定开发计划; 1.2 执行方案,并进行产品鉴定,生产转化,技术规范制定工作; 1.3 积极关注行业发展动态,积累研发素材; 1.4 总结产品研发经验,持续改进产品性能; 1.5 主持产品技术转化和制造技术交底工作; 1.6 为产品工程部、市场部提供技术支持; 1.7 根据公司其他部门的要求进行设计修改和设计改进。 1.8 提交报告: 1.8.1 周:每周工作总结及下周工作计划,新产品开发计划进度报表; 1.8.2 月:每月工作总结及下月工作计划; 1.8.3 季:季度工作总结及下季度工作计划; 1.8.4 年:年度工作总结及下年度工作计划;
) j5 i8 w% q" l- k
! b2 ~2 l2 |0 C4 Q( `职位要求:
  d% I, u( ]/ S. _$ d2.0 任职资格 2.1 教育背景 电子及相关专业本科以上学历。 2.2 培训经历 受过研发管理,项目管理等方面的培训。 2.3 经验 5年以上产品研发经验,具有独立承担并完成研发项目经验者优先。 2.4 技能技巧 a. 对半导体产业及制程有较深刻的了解; b. 有扎实的理论基础和技术工作经验,能独立解决产品使用相关问题; c. 掌握研发使用的计算机软件; d. 较强的英语阅读能力。
作者: ranica    時間: 2011-8-3 02:47 PM
招聘公司:a top 15 semiconductor company! X% g* p' q. m6 x8 l0 K% u
招聘岗位:Analog Design Engineer
2 P( X  G4 c9 d$ l) u工作地点:Shanghai& H% h: g! E; i% M

: y! G: z* C. R9 F; v岗位描述:: O6 b6 u9 S. q  W: A9 b
Responsibility: The primary role of this position is to design the highly complex analog and mixed-signal circuits. The responsibilities include but not to be limited to: - Analog and mixed circuit definition, developing and evaluation. - Design and development of the high performance analog circuits. - Providing the technical guidance to layout, application and evaluation engineers. - Engagement with key customers, application engineering and marketing is required to understand the key specifications and functions the designs must meet.1 H7 R- Y. W1 V
; \# a0 U7 m& o, L" U
职位要求:3 L5 g" [3 g, O( w+ G* j% m5 I
Requirement: - MSEE/PHD in Microelectronics/Electrical Engineering/Communication Engineering - Circuit design experience in mixed-signal, PLL, AMP, A/D, D/A converter designs. - Proven track record of innovative initiatives in previous designs - Self motivating, good team player and good communication skill - Good English speaking and writing skill. - Flexibility to have oversea and/or domestic travels.
作者: ranica    時間: 2011-8-5 01:42 PM
招聘公司:A famous IC company6 f, U* G8 a+ K, F' h
招聘岗位:Platform Concept Engineer! w5 V' I! s% H. g2 E% G
工作地点:Xi'an' h! ], F. R$ V  b8 D, p7 E

- z0 D/ A0 a4 j0 b4 {  T岗位描述:
3 @# |8 m4 f) S; O5 [Description '� Responsible for quality and completeness of customer and system requirements for mobile phone platforms and components. About 2 projects in parallel with 1000 - 2000 requirements each depending on project scope. � Participation in continuous improvement activities for requirements management and engineering. � Product Requirements Management * Overall responsibility for Requirements Repository and documents * Gathering and elicitation of requirements/ needs from stakeholders * Requirements interface between the development team and internal and external customers/ stakeholders * Supports mapping of requirements to components * Monitors and tracks: quality of requirements and traceability * Drives requirement reviews * Requirements change handling/ participation in CCBs * Answers request for information together with sales, marketing and technical experts. � Participation in continuous improvement activities * Alignment across chip and platforms projects in regular meetings * Provide customer requirements for reuse * Participate in continuous process and methodology improvement (TEC RE) � Be internal and external interfaces operate on an international basis. * Internal: Business Line Marketing and System / Concept Engineering, Verification Management, Project and Program Management, Quality Management. * External: IFX customers. : Z4 Z; V; @1 `" m: j
1 i3 k3 k$ q9 _6 n1 Q$ \5 U* z
职位要求:, L3 c5 `. Y, k0 j: h
Qualifications '� Ph.D or Master Degree on Electronics Engineering/Communication/ Microelectronics or relevant � Fluent in English � Rational Requisite Pro � MS Office (desirable including VBA) � Adobe Framemaker (desirable) � Social and communicative skills � Self-organization � Professional experience in System Engineering or related disciplines � Good expertise in Requirements Management'
作者: ranica    時間: 2011-8-10 05:26 PM
招聘公司:a top 15 semiconductor company
" R% D& Z1 Q$ J( S1 y招聘岗位:Application Engineer – Clock
/ Y; h8 o8 N  s工作地点:Shanghai
* _2 k& ^8 |8 E
4 J/ U$ {. D8 P- K岗位描述:2 B# u3 {) N( _- x5 P# j5 i
Role & Responsibilities: · Support CSS (Clock and Signal Synthesis) key customers in device evaluation, system structure recommendation, schematics design and layout, problem diagnosis and trouble shooting, performance testing and benchmarking · Develop and customize reference/sub-system designs to demonstrate both component and signal chain level features, performance and advantages, including localized evaluation boards, sub-system boards and customer system boards · Facilitate new product definition and development by actively working with local and product line team members to gather requirements, generate technical spec and benchmark performance · Providing technical assistance and trainings to field application and sales teams · Setup and operate both internal and external labs in the region
9 D* d7 w! K8 i, X) A( A; Q8 ]  D4 G+ t8 o" M
职位要求:
0 n. A6 N9 w" c9 RBasic Qualifications (Technology, products….etc) · MSEE/PHD, 5+ years of Clock and Signal Synthesis related experience o PLL, linear system theory and practice o Circuit simulation, test and performance measurement o Schematic design and layout experience o Skilled on lab equipments · Solid knowledge in wired/wireless communications systems is preferred · Good written and verbal communications skills in both English and Mandarin · Time management skills, multi-tasking ability and team player · Willing to travel frequently in China and aboard
作者: ranica    時間: 2011-8-10 05:27 PM
招聘公司:a top 15 semiconductor company% U- k; Y1 Q7 U5 }5 H) b" o
招聘岗位:Applications Engineer – MicroConverters (ADuC)/ e9 [# s' {9 {
工作地点:Beijing
7 r2 Y& Y* Q  Z9 ?8 M  E  N9 a3 S' s# l! B' e# m
岗位描述:
% _3 g* K" W0 q. F- k/ q* ?Roles & Responsibilities ² Develop User’s Guides, Data Sheets, Application Notes, and other technical documentations for customers ² Develop reference designs for key applications with the ADuC products ² Provide technical training to FAEs ² Support ADuC key customers ² Provide input into ADuC product roadmap and lead in detailed product definitions
" j1 y# n2 ]$ E( a
$ ~) m7 K2 v- Y- v5 T) V职位要求:
' m2 s' F$ W- k9 S+ Z0 P! YRequirements ² MS in EE/CS with 0~3 year experience, or PHD in EE/CS ² Experience in ARM/Cortex firmware ² Be able to attend deep technical training abroad for extended period of time and desire on learning to become an ADuC expert applications resource in China ² 20% of time international and domestic travels ² Experience in analog and mixed-signal board level design and troubleshooting is a plus ² Good spoken and written English ² Self motivation, desire on learning and good communication skills
作者: ranica    時間: 2011-8-10 05:28 PM
招聘公司:a top 15 semiconductor company: U- y8 W- @0 t3 M3 e& F" J
招聘岗位:Application Engineer – Hardware Tranceiver
, ~- q; C7 |3 z8 F工作地点:Shanghai
' }2 Z( M. C" ~& F2 ]2 w; l9 B0 ~3 A" L# h0 y2 n. }; i
岗位描述:$ J7 ~/ [1 [# `1 r( R- L  }& K: G
Role & Responsibilities: · Support transceiver key customers in device evaluation, system structure recommendation, schematics design and layout, problem diagnosis and trouble shooting, performance testing and benchmarking · Develop and customize reference/sub-system designs to demonstrate both component and signal chain level features, performance and advantages, including localized evaluation boards, sub-system boards and customer system boards · Facilitate new product definition and development by actively working with local and product line team members to gather requirements, generate technical spec and benchmark performance · Providing technical assistance and trainings to field application and sales teams · Setup and operate both internal and external labs in the region6 B) l3 S. `) W) K4 f" P

" a5 ?- c' ^2 z- a* ]$ E职位要求:) U. O/ j9 B7 w9 s9 W* e; v) ~
Basic Qualifications (Technology, products….etc) · MSEE/PHD, 3+ years of communication analog front-end design related experience o Signal chain level understanding to RF, ADC/DAC, Digital Filtering o Circuit simulation, test and performance measurement o Schematic design and layout experience o Skilled on lab equipments · Solid knowledge in wired/wireless communications systems is preferred · Good written and verbal communications skills in both English and Mandarin · Time management skills, multi-tasking ability and team player · Willing to travel frequently in China and aboard
作者: ranica    時間: 2011-8-11 03:40 PM
招聘公司:A famous IC company; ?6 ]' J  j8 |( s% ^+ n
招聘岗位:Software Developer – Circuit Simulation
9 G/ @" I! P8 s0 X) x工作地点:Shanghai% L; H. ~, p) v5 ^

; u9 _. B" k5 b' h- U岗位描述:
) l! V6 v8 E/ Z( C! d4 A. lJob Description Develop and maintain the circuit simulation engine for IC-Package-PCB co-analysis
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职位要求:/ ?- r. O% M9 Q8 {; [! @( o; e" m
Qualifications At least 1+ years experience in software design and development Deep understanding of numerical integration, Newton-Raphson iteration and related knowledge Strong knowledge of C/C++ programming skills Good communication (written and verbal) skills in English MS or PhD in Applied Mathematics, Micro Electronics or related fields
作者: ranica    時間: 2011-8-11 03:42 PM
招聘公司:A famous IC company6 K- s" X* @' b" V: m, N' v$ T" l
招聘岗位:Software Developer – Signal and Power Integrity Simulation
! k4 r* @4 M2 \) j% }! `工作地点:Shanghai1 t6 S) l6 ^" J6 Z3 m$ D" J6 l8 ]

7 I/ C# h; J1 b9 ~8 C岗位描述:
/ R$ G: n# A  D; w, u" r( gJob Description Develop and maintain the simulation engine for IC-package-PCB power and signal integrity solution
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8 n3 C, X7 v" I+ [# b  Z) m" V" @职位要求:
$ r) ^. K; _7 N& F: L+ q. jQualifications Strong C/C++ programming experience in Linux Experience with the algorithm and implementation of large data parsing, handling and processing Experience with IC placement and routing including LEF/DEF/GDS data is required Experience with RLC, transmission line circuit or S-parameter simulations is preferred Excellent verbal and written communication skills M.S. or Ph.D. in Electrical Engineering, Computer Science or other related areas
作者: ranica    時間: 2011-8-30 02:12 PM
招聘公司:A famous IC company
6 Q3 G4 S+ y: U招聘岗位:DFT team manager (MCE ASIC)
* q  T- R0 |1 L工作地点:Shanghai  V1 A3 r% i: w! j6 h/ K
$ \" y3 B7 V3 L+ I$ }
岗位描述:1 b5 w1 T8 {' q& x0 W# r3 K
Qualifications: 1. BS (MS preferred) in microelectronics, electrical engineering or equivalent with 5+ years of DFT design experience, preferably with large SoC chips. 2. Handy experience on scan, mbist, boundary scan, ATPG and analog DFT, with Mentor/Synopsys/Syntest tools and RTL/gate simulation. 3. Good communication skill in a multi-national multi-team working environment. Experience with ATE tester and Production Engineer is a strong plus. 4. RTL design and STA experience is a strong plus. 5. Fluent in both written and spoken English
  _6 n6 t# s  c' T  p- i0 j+ b3 k1 o/ G& y* x; k& ]
职位要求:
2 l% v( R- b9 ?8 n* z- N- oDescription: DFT team manager Focus on leading the DFT team for DFT design & debugging of leading-edge large SoC, and work with Production Engineering team on large volume production.
作者: ranica    時間: 2011-9-22 03:19 PM
招聘公司:A famous European IC company
# u, }; z+ s- J$ c" X6 j! k' ]招聘岗位:Product Application Engineer : L, |3 f4 E# M; t
工作地点:Shanghai
7 P0 g; c, v& L, G7 \; v( t4 O  e# l  ~. d
岗位描述:# _! w: u1 N  V% Y4 t
1.Product application tasks for BST sensor products 2.Support BST FAE/SLS organization in product specific questions 3.Specific,develop,test and release hardware and software tools for BST products 4.Board level debugging 5.Bring-up of software blocks such as device driver or algorithms on target hardware
- Q- |& c" r& E9 r9 u; ~+ K  ?% Q  m4 {+ s3 ^. k2 s5 N
职位要求:
4 r5 A' N. {' h3 f! ^1 }Requirements 1.Engineering Degree(BSc. or Master) Electronics communication or equivalent experience,desired 2+ year experience 2.Strong experience in hardware electronic design and board level tasks 3.Strong experience in debugging consumer communication buses such as I2P,SPI 4.Software prototyping and debugging (embedded software) 5.Appreciation of the semiconductor technology and industry in consumer application (mobile phone ,PCs,navigation systems)
作者: ranica    時間: 2011-10-12 10:40 AM
招聘公司:A Fabless IC design Company: l0 E7 g6 C# ^2 t
招聘岗位:Senior Analog Design Engineer
$ `" B, _" \7 X* \工作地点:Suzhou
/ E( O1 e4 L/ r* Q( c( {" D5 r* W) k; ?
岗位描述:# [0 e0 H( k1 X' h* r" w
职位描述: 1、负责模拟IC与混合信号IC(ADC/DAC)的设计工作,负责模块和整体芯片的仿真和验证。 2、设计版图布局,并协助版图工程师进行版图设计,确保版图达到电路设计的要求 3、拟定实验室评估计划,并使用实验室测试设备对工程样片进行测试评估,分析不良原因。 4、协助测试工程师进行中测和成测规范的定义和程序开发,验证。 5、撰写设计报告、产品手册等相关技术文档。 7 j: [0 Q$ z% ~: I6 z3 V
4 Q$ T* [4 j/ i" {
职位要求:
4 {# w" G0 e. X3 X! d& v任职要求: 1、微电子、电子工程、通信等电子类相关专业,博士或硕士三年以上模拟/混合IC设计工作经验。 2、能独立设计开发IC产品并至少独立设计过一款已批量生产的产品。熟悉模拟/混合信号芯片设计流程及工具,包括Cadence、Synopsys、Mentor等。 3、具备扎实的模拟电路设计理论基础,具有良好的学习、分析和创新能力,在电子电路方面有良好的悟性。 4、良好的英文读、写能力。 5、具有良好的人际沟通能力、主动性及团队合作精神。 6、具有A/D、D/A设计经验者优先。
作者: ranica    時間: 2011-10-12 10:41 AM
招聘公司:A Fabless IC design Company
( U' [. G' N5 @) J1 B招聘岗位:RF IC Design Engineer
/ G2 G, ?, o1 Q工作地点:Suzhou& c5 I& G5 p7 F% b7 n
: q4 V4 f  j1 g
岗位描述:; P- o& T3 I8 c6 q+ Z& `, \& b
职位描述: 1、参与设计基于CMOS工艺的无线接收、发射系统,实现一个或多个射频模块如LNA, Mixer, VGA, PA等。 2、进行后端版图开发,参数提取并后仿验证。 3、使用实验室测试设备对工程样片进行特性评价、系统调试。 ; O  F6 A8 C1 f, V

" ]  f3 m: ^& h" N3 C职位要求:& g0 ?4 \% W' H* ?
任职要求: 1、微电子、电子工程、通信等电子类相关专业,硕士或本科三年以上RF设计工作经验。 2、深入理解射频通信电路各种模块工作原理及性能指标,熟练掌握高频电子电路设计,如LNA、 Mixer、VGA、VCO、PLL中的一种电路等。 3、熟悉RF设计中的仿真、版图设计必需的EDA工具如ADS,Cadence。 4、良好的英文读、写能力。 5、具有良好人际沟通能力、主动性及团队合作精神。
作者: ranica    時間: 2011-10-21 09:34 AM
招聘公司:A IC design company
* |/ N7 W( v) Y1 h  u3 x" |, v招聘岗位:Operations manager
: G; X* C; t2 j( v8 ]8 L工作地点:Shanghai
0 _1 H" d& V+ H2 b! I" C
5 n& m7 W' ]2 M7 p- `0 g岗位描述:
% u5 K8 U, \# I* y全面负责所有后端生产的环节,包括将IC从样品到量产的全过程。运营经理将致力于制定从试生产流片到大规模生产包括测试的全面生产计划。提前进行生产安排和计划,使得为满足客户需求的各项产能得以保证。管理和维持与晶圆加工厂,IC封装厂以及测试代工厂的关系。具体的职责如下: 岗位描述: 1. 作为公司和晶圆厂的界面,从制造层面提升产品的良率。从设计到测试各方面推动提升新产品质量和良率, 2. 寻找和建立低成本的晶圆生产方案,与代工厂合作进行工艺改良 3. 建立生产流程 4. 监督封装和测试的效果,确定生产过程的瓶颈并加以改进 5. 审查评估生产流程和方法,不断优化以提高质量,降低成本,优化良率和提高测试覆盖率。 6. 与设计工程师紧密合作从而解决生产测试的问题 7. 要求协助销售人员提供销售预测数据,提供每周的生产报告从而保证满足客户的需求 8. 日常的采购和价格管理
3 P1 A6 ?0 @3 Y+ ?  h
& x5 `& n& p  L8 p职位要求:3 o# A6 A* g: B8 r, n5 ]
任职要求: 1、与晶圆厂、封装测试厂有良好的人脉关系,可以获得大力度的支持: 2、熟悉IC产业链的各个环节,包括IC设计、封装、测试、物流、终端应用、晶圆制造等等,具体包括: a.封装设计规划:熟悉IC制造情况,针对IC后端制造、消费的特点、主流封装测试企业的封装类型,为不同的芯片定义合适的封装形式。 b.芯片生产解决方案:针对不同芯片的工艺、应用、消费类型、终端制造、各家封装测试厂的产能等诸多信息,制定出完善的解决方案。 c.谈判技巧:熟悉整个IC产业链的各个环节的运营成本。 d.熟悉晶圆制造、封装测试工艺技术:针对不同的产品,利用晶圆代工、封装测试工艺技术提升良率。 e.物流解决方案:缩短芯片生产周期,降低流成本。 f.芯片品质规划:针对不同应用的芯片规划出不同的可靠性测试方案,充分地保证芯片的品质。针对芯片可靠性测试的结果进行不同的应对方案,保证芯片在最短的时间内推向市场而无可靠性方面的风险。
作者: ranica    時間: 2011-11-4 05:27 PM
招聘公司:famous IC design company in shanghai  S# F. B, h# O
招聘岗位:系统/应用工程师1 m: |$ v" e& X6 t
工作地点:Shanghai
5 r% K. |# I" j% D5 E/ l& s' E. k) |' \$ D( m2 y
岗位描述:
; ?6 ~6 ~" [/ m' O! u; I主要工作职责: 1. 负责笔记本、电动工具、电动自行车等锂电池保护系统的软硬件设计 2. 参与公司锂电池计量和保护芯片的新产品的系统开发、设计及验证 3. 制定产品规格,就芯片原理及关键参数等技术问题与客户交流,了解客户真实需求 4. 配合设计人员完成芯片设计,提供建设性意见 5. 制定芯片验证方案,完成芯片的系统验证 6. 针对公司产品设计应用电路、编写应用软件、整理应用笔记等技术文档 7. 研究锂电池容量算法,提取满足客户需要的容量模型 8. 进行内部员工培训,为FAE提供技术培训和支持, 9. 为销售提供技术支持,解决用户遇到的技术问题
0 x+ I6 |) }. z4 D. x9 K/ a  t) O2 w
职位要求:% i, r6 e- o' S# q
职位要求: 1. 计算机、电子、微电子、通信相关专业本科及以上学历; 2. 3年以上芯片应用经验,曾参与或主导锂电池计量或保护芯片产品的设计。 3. 了解笔记本、电动工具、电动自行车等应用系统的电气特性 4. 了解锂电池Cell及Pack特性,对锂电池容量模型具有一定了解 5. 正确理解Spec要求,可独立完成Spec的制定和芯片的验证工作 6. 精通嵌入式软件开发,有一定的C/C++编程语言经验 7. 丰富的电路分析、设计经验,熟悉常用的电池元器件的应用 8. 良好的沟通能力,可正确理解客户的真实需求 9. 认同客户导向,可快速解决客户问题 10. 具备良好的读写与英语能力 11. 积极进取,良好的团队合作精神。
作者: ranica    時間: 2011-11-4 05:35 PM
招聘公司:A famous IC company
- {6 @8 F% e8 N+ q) O: ~1 a& ?招聘岗位:South China Country Manager& A/ v+ A% n2 e1 I, ]$ }% W
工作地点:Shenzhen  J# a. ~* R4 c5 a

1 [# Q4 v' q9 m# a0 J岗位描述:7 \1 N" n/ `3 `  U7 j* o' h# c& ~
Job Summary: The South China Country Manager will have overall responsibility for developing and implementing the sales plans. He/she will be responsible for building/managing the existing sales organization and driving customer design wins and revenue. This will include recruiting and developing a sales organization with a never give up mindset that is capable of meeting and exceeding the company’s design wins, orders, and revenue objectives, implementing disciplined sales processes and playing a key role in closing major transactions. The CM will also be expected to play a significant leadership role in the development of the company’s overall market strategy for South China. He/she must have a proven track record of success leading and growing high performing sales organizations. He/she must possess strong leadership skills and the ability to attract, develop, and motivate high performing Sales, FAE professionals and distributors. The CM must possess a combination of strong technical sales experience as well as refined leadership/management skills. XX is seeking someone who has the managerial skills to scale the South China market for growth, including developing the appropriate methodology, forecasting and personnel leadership; as well as a strong individual technical sales acumen and “closer” mentality. This individual needs to be hands-on, visiting customers, developing high level relations and be a resourceful executive and not a “manager of managers”.
* Z6 J4 ^, y  D5 i( P
) i3 m% e' y% H' L$ P  a职位要求:& w( d2 I( N, X5 c  G! M8 P
Experience: 12 + years of experience with a BS degree preferred
作者: tk02561    時間: 2011-11-14 04:15 PM
招聘公司:a top 15 semiconductor company' t# e9 f* c" a* k* Z
招聘岗位:Experienced Product Engineer; I$ E* o. P, M! f  v
工作地点:Shanghai
9 r& n$ x% J) N" l
. N1 t8 B$ K; }! P; V7 o岗位描述:, Z' ~$ c, x+ }0 `
Description: The role of this position is primarily to qualify the performance of new silicon that is high speed PLL related. The responsibilities include but not limited to: + U% Y! q2 w. v$ q) j0 p1 l1 s' C

* W; a/ X' F8 ^" Y Contributions to the measurability at the feasibility stage of design.
5 {. q2 O+ K1 r. c0 K Create a checklist based on the deep understanding of the datasheet.
% S6 T1 h" J* v! r; Z  [& @ Develop evaluation scheme.
7 X0 u' }  c- R( G5 I. _# e Develop and implement evaluation system including both hardware and software. 1 T1 ^; D/ Y. o4 g7 T! |/ P1 H
 Measure functionality and performance on evaluation bench. ; Q- P5 \7 a: J3 s5 a
 Debugging contributions (pre and post silicon) to the full understanding of the silicon.
# a8 _: l) z$ i* x$ i, ] Compose the evaluation report and work with Test and Application Engineer to generate the datasheet. ! C* p' x0 k# d3 ?8 r* S& J% K
 Support design, test, and application engineers with problem diagnosis and trouble shooting.
作者: tk02561    時間: 2011-11-14 04:15 PM
职位要求:Qualifications 6 |: e, d0 f( P. N% B
 Master degree in EE related major, 2-10 years experience
+ ]4 z& q# l1 W; m( [5 C Basic knowledge on PLL and converter clocking ) l& ~6 m( Q  X. A5 k2 f
 Experience in software & hardware development on mixed-signal high speed system; schematic and PCB experience. 7 {" [5 z1 ]0 d
 Debugging experience with hardware and software working together on board level; familiar with common instruments such as spectrum analyzer, signal source and oscilloscope.& r) S; H4 o* `, \& [
 Experience in any of below is a plus.
) B" y5 @$ G, x8 I# k) ^6 d7 Y Understand IC evaluation and performance specification measurement theory and technique
0 d& `4 X/ y$ M  ^* A& Z7 H3 A, d$ r Labview/FPGA ! M+ g- K5 r1 F/ |1 ^
 Proven track record of innovative initiatives in previous projects.
, f) Z/ |3 `6 a3 O' G. X Eager to learn new things. ) F. a! W* e' v7 q8 A
 Self motivating, good team player and good communication skill.
1 [  r/ M' i1 l3 h. L+ G Good English speaking and writing skill.
作者: tk02561    時間: 2011-11-14 04:17 PM
招聘公司:a top 15 semiconductor company
; r4 q% `# r7 i; ?招聘岗位:Experienced Analog Designer
$ ]( d  A, B6 B( g1 x8 F工作地点:Shanghai$ k6 o% ~8 e$ l+ G5 D5 y2 N% P" \

/ a7 G( o& I7 k! G5 ?$ k$ S& Z岗位描述:6 J& s- X: [1 M( j7 ?1 X0 r  q
Responsibility: Participate in mix-signal IC development high speed clock products, working with multi-site engineers on different functions such as analog/digital design, application, product evaluation and layout. The candidate is expected to contribute to analog circuit design, simulation, probe and debug. And the candidate should also be able to understand board level issues to make connection to real world application.
作者: tk02561    時間: 2011-11-14 04:17 PM
职位要求:Requirement: 1 N* n) F4 T, H0 g! _  j" t

: q! Z, f. U% q" p: |7 B4 n MSEE or PHD in EE related majors. 4+ years working experience for Master, 2+ years for PHD.
9 ^+ g% P/ R* z3 u+ N/ z Proactive, and good communication.
1 k, v, E  O3 E9 o1 B5 d Transistor-level circuit design, simulation, and layout of analog /mixed-signal integrated circuit, with track record of high quality circuit design. Experience in high speed PLL design is a strong plus.
, k7 m( d! ~- @2 b- p* {! H0 H Solid understanding of device physics. High level of mathematical sophistication is a strong plus
8 u+ e9 @) A! {' ] Solid problem-solving and trouble-shooting skills. Enjoy tinkering, taking things apart and making things work.
/ O+ j9 w2 K: }% P Innovative, with ability to raise good questions. / v5 ?) K. m4 h) n' c6 {) ?' Y
 Self motivation, result oriented, good team work and communication skills.
: m/ r1 t, r4 f( s  D; Q1 r Good spoken and written English
作者: ranica    時間: 2011-11-21 03:48 PM
招聘公司:A communications chip company! ]9 ]1 L8 T3 @. n$ e' c  m( L, A0 P
招聘岗位:算法工程师# ~/ N1 a# F' t2 Q& y
工作地点:Shanghai
0 V2 j1 s6 L, ]- h3 j4 J, `# `
& C) |9 e# L$ z  p6 S主要职责: 终端物理层算法研究和优化 ' _- e, S6 w) ?2 y9 T
0 c4 ]6 U8 w  f* ^3 B, C
职位要求:
2 ^: k6 L( m# j1 B3 P5 V3 \: t任职要求: 1、具有电子通信、信号处理等相关专业本科及以上学历,有志于移动通信研发 2、本科两年或硕士一年以上工作经验 3、有良好的移动通信知识,熟悉信号处理、均衡、编译码、多天线等通信基础原理 4、熟练使用Matlab等仿真工具,熟练使用C语言 5、能熟练阅读英文文献,较强的沟通能力和自学能力 6、有信道估计、编译码、OFDM、MIMO等技术研究经历者优先考虑 7、熟悉GSM、TD-SCDMA、LTE、WCDMA产品原理、通信协议者优先考虑
作者: ranica    時間: 2011-11-21 03:48 PM
招聘公司:A communications chip company: K% @( B! P' q: [5 Q5 N8 H
招聘岗位:物理层算法软件工程师
" _/ N4 p  x2 {; B2 a工作地点:Shanghai
, @& z$ i9 y! ~5 x& c6 v! ~/ p4 V
8 @5 b' u9 S" F0 ~6 o/ ~& L岗位描述:( G( W! O( h# Z  {! G. P  h
工作目的和性质:根据部门安排,承担无线通讯领域终端物理层算法关键技术研究,开发并维护符合公司产品/项目目标需求的物理层算法软件组件,支持物理层算法软件组件的产品化集成应用。 主要职责: 1.跟踪GSM/TD-SCDMA/TD-LTE等无线通信标准的演进,执行相关标准的产品化技术研究。 2.执行基于GSM/TD-SCDMA/TD-LTE等无线通信标准的终端物理层算法软件组件开发、测试和维护,对工作进度和质量负责。 3.参与物理层算法软件组件的产品化集成应用工作,对物理层算法软件组件在产品系统中的功能和性能保障负责。 4.分析解决产品商用过程中的物理层算法相关问题,对技术问题的解决进度和质量负责。6 U* a- E) `, B3 b. P# k5 I: w
, F. H2 k# x1 I2 B
职位要求:
2 |: O/ D7 H: X* ~6 ?# g% g% U所需资历: 1.学历/所受培训:通信、信号处理、应用数学/物理等专业学士以上学历。 2.工作经验: ⑴.具有良好嵌入式系统软件开发经验,熟练使用C/C++和嵌入式汇编从事DSP软件开发。 ⑵.理论基础扎实,具备信号处理算法设计、仿真分析、和实现经验,能熟练从事物理层算法的产品化应用开发工作。 ⑶.熟悉2G/3G/4G等无线通讯标准,具有无线通讯终端物理层协议/算法软件开发和测试经验,能够从终端物理层过程的效率出发进行算法软件组件的优化设计。 3.其他要求 ⑴.良好的沟通表达能力,团队协作性好。 ⑵.质量意识,责任意识强。 ⑶.良好的中、英文读写能力。
作者: ranica    時間: 2011-11-21 03:49 PM
招聘公司:A communications chip company- n& D! V* \: G# l
招聘岗位:物理层协议软件工程师. k8 i, P2 _8 c" X4 g
工作地点:Shanghai. y- l, _" O0 z( d! N* f
+ p+ j: g% o7 P# N' l
岗位描述:
/ o( Q5 @; R& w8 u1 ^3 D工作目的和性质:根据部门安排,承担无线通讯领域终端物理层协议关键技术研究,开发并维护符合公司产品/项目目标需求的物理层协议软件组件,支持物理层协议软件组件的产品化集成应用。 主要职责: 1.跟踪GSM/TD-SCDMA/TD-LTE等无线通信标准的演进,执行相关标准的产品化技术研究。 2.执行基于GSM/TD-SCDMA/TD-LTE等无线通信标准的终端物理层协议软件组件开发、测试和维护,对工作进度和质量负责。 3.参与物理层协议软件组件的产品化集成应用工作,对物理层协议软件组件在产品系统中的功能和性能负责。 4.分析解决产品商用过程中的物理层协议相关问题,对技术问题的解决进度和质量负责。
* X  J- n) X4 W: y! B+ j
5 s/ c- L* n5 e# }职位要求:# B: v. ^' m; }* h2 h/ z3 p
所需资历: 1.学历/所受培训:通信、计算机软件、电子工程等专业学士以上学历。 2.工作经验: ⑴.具有良好嵌入式系统软件开发经验,能熟练使用C/C++和嵌入式汇编从事DSP软件开发。 ⑵.熟悉2G/3G/4G等无线通讯标准,具有无线通讯设备或终端物理层协议软件开发和测试经验。 3.其他要求 ⑴.良好的沟通表达能力,团队协作性好。 ⑵.质量意识,责任意识强。 ⑶.良好的中、英文读写能力。
作者: ranica    時間: 2011-11-21 03:49 PM
招聘公司:A communications chip company
" W$ t/ R/ ^9 C' n' S3 C1 u招聘岗位:协议软件工程师
1 i" p6 s5 P: Z+ ^& }; D工作地点:Shanghai
, c  N2 x/ [  M8 s
" G) F; `: P" V& [9 f  ]& d主要职责: 1.协议软件的系统调拭、问题分析解决和技术支持 2.协议软件模块的开发维护和集成测试
& i: t* b9 e; T; }职位要求:( C0 K9 E! q4 {- {3 m, e- S
所需资历: 1.学历/所受培训:本科及以上学历,计算机、通信、信息与信号系统等相关专业; 2.其他要求:有意愿在无线移动通信领域和终端行业发展;积极主动,沟通良好;英语读写良好;具备较好的逻辑思维能力;有一定的C编程基础。
作者: ranica    時間: 2011-12-6 02:31 PM
招聘公司:A fabless IC design company
5 ]1 D+ z9 y9 n招聘岗位:系统工程师7 N0 i' l' T+ w3 ^9 d2 @$ y
工作地点:Beijing/ k4 U/ D, x  k' ]
岗位描述:
  ?: O: Y" `; h# K主要职责: 为客户提供系统应用的参考方案和相关文档,指导FAE解决客户在实际应用中的技术问题,配合销售部完成销售目标。 / u' I7 p' j; C2 R! v9 S

" ]2 t; p# U1 y0 o/ \! N9 f- x职位要求:
$ _* k# |  L# G职位需求: - - 计算机、通信、电子工程类专业,本科及以上学历。英语CET-4级以上水平,良好的英文读写能力; - 熟悉通信和网络的基本知识,了解通信系统或民用消费类产品的框架结构及应用领域; - 有国内外知名通信公司通信产品或数字电视、机顶盒产品开发经验者优先; - 具备较强的芯片级理解能力,对高速SerDes、以太网接口芯片、交换芯片、数字电视内芯片、ADC其中之一以上的芯片有深入的研究或应用,可以很准确的知道芯片的指标含义和解释; - 具有2个中型项目或1年以上的单板硬件、底层驱动、单板逻辑三种工作开发经历; - 能够独立调试电源、CPU、FPGA及ASIC芯片,熟练掌握 Cadence或PowerPCB等软件,熟知 PCB 的布线规则和产品的生产流程; - - 根据电子线路原理图产生网表,配合信号约束和结构条件进行PCB Layout, 并生成 Gerber 和 SMT 相关文件;2、- 负责公司PCB、原理图和BOM表的整理和归档工作;跟踪解决生产线上出现的生产工艺问题;根据项目要求选择合适的 PCB 供应商和元器件供应商; - 具备敏锐和快速的反应能力;良好的思维能力、信息收集、分析能力; - 良好的团队合作意识和沟通能力; - 适应经常出差,勤奋刻苦,爱岗敬业。
作者: ranica    時間: 2012-1-11 02:56 PM
招聘公司:A famous IC company6 ~" E& J( y5 G) X
招聘岗位:Head of Project Office(Worldwide): c* m, u: g" g4 x6 G: ~4 K
工作地点:Xi'an3 b+ t9 d; n1 K. K$ Z
# T: h4 r( n. \
岗位描述:
# a0 C& Y% d" @Responsibilities In this position, your key responsibilities include below but not limited to: Solid know-how in usage of project management tools Expert knowledge in the system development framework Strong analytical skills and systematic working style Excellent presentation skills Fluent English is a must > 5 years technical experience in product development Project Management Experience in hardware, software, technology or system project management Experience of working with different cultures
作者: ranica    時間: 2012-1-11 02:56 PM
职位要求:* x7 d) c: Z* g3 W1 T3 n
Qualifications Leading the project office organization worldwide Support R&D line managers and Program Manager in the demand planning for new projects and management of the project pipeline Define KPI/measures on R&D efficiency and work closely with RD management to improve organization efficiency Drive project management methodology, configuration management methodology. Ensure that projects are set up and executed according to development process * Support project and program managers in: - Structuring of the system / hardware / software project - Tailoring of the process and definition of synchronization milestones - Consulting for System Verification Concept - Consulting for setup of project infrastructure (IPP, configuration management, @risk) * WLS DP Training of project managers Support Project configuration management (Change Management via Unified Tracking Platform), Product structure setup and maintenance. Local R&D Project Management Tool support (MS Project Enterprise etc) Best Practice Sharing and Continuous Improvement, Lessons Learned moderation Tracking Key Performance Indicators for R&D in cooperation with R&D Line Management * KPIs for overall WLS R&D performance * KPIs for productivity of R&D sites * KPIs for productivity of outsourcing partners Analyzes Key Performance Indicators within the R&D community and ensures that data collection leads to improvement programs Defines operative and performance R&D reporting in cooperation with Business Line and R&D Line Management
作者: ranica    時間: 2012-2-3 04:57 PM
招聘公司:a start-up company with high performance bletooth and Wifi technology3 w0 C& o7 u7 E& T9 k- n( {
招聘岗位:RF/analog IC design engineer
# m1 _: I# \9 ?工作地点:Shanghai* R3 ^6 g9 i. i
$ d' ^) u0 a! i% I  h
岗位描述:0 p  |" w/ Y$ J0 t
Job description The candidate will be responsible for CMOS RF and analog circuit schematic design, layout design, RFIC test and debug for wireless communication systems such as Bluetooth, WiFi, etc. The candidate must have design and tape-out experience on etc. Responsibilities - Design RF/analog block circuit meeting the system requirements - RF/analog block circuit layout design and post-simulation - RFIC test and debug - Documentation and report about the designed circuit blocks) F9 T) H: Q* h* |3 U3 p% T$ i3 d
" @/ O* d. T4 N; E* w) e5 U
职位要求:
' a. P! G5 f6 {1 V1 [' r7 cQualifications - BS or above, Electrical Engineering - 2 year’s or more industry experience is must - Tape-out experience is must - Knowledge about RF system, device modeling - Knowledge about bulk CMOS process - Familiar with Cadence tools including spectre, spectreRF, ultrasim, virtuoso, and calibre LVS/DRC/PEX, etc - Familiar with spectrum analyzer, oscilloscope, vector network analyzer etc - Good English communication skills - Self-motivated emphasis on teamwork, schedule, plan and delivery - Bluetooth and WiFi circuit development experience is preferred
作者: ranica    時間: 2012-2-15 03:41 PM
招聘公司:A famous IC company# a! U  N, J: o6 p
招聘岗位:APPLICATION ENGINEER (AE)
! m$ @% W3 K: O; f% q! _* t6 Z1 z工作地点:Shanghai
) I; a" k1 T% j" t
! Z2 |" T& x2 z  w0 e岗位描述:. A) j$ Z: L( M( B) g1 m7 k
JOB DESCRIPTION RESPONSIBILITIES & INTERFACE The Application Eng., under the coordination of VP Smart Grid Solution, is responsible for actively promoting ****** technical capabilities and Product offering among Customers and Prospects. She/He is accountable for insuring (i) Correct understanding of Customers’ technical requirements (ii) Professional feasibility analysis (iii) Effective coordination with ****** Sales and Engineering team (iv) Efficient Customer technical interface (v) Comprehensive technical solution build-up, ensuring customer requirements are reviewed to determine product applications, problems are investigated and resolved (vi) Reference and Evaluation Kit Development with related Collaterals-Documentations 3.1 Upstream interface The Application Eng. reports to the VP Smart Gird Solutions 3.2 Downstream interface Not Applicable 3.4 Main processes interactions Sales & Customer Relationship Process Pre-sales To coordinate internal organizations in order to bring ****** offering to meet Customers’ expectations, both in terms of quality as well as in terms of technical solution. In the Pre-Sales Phase, the Application works in cooperation with Sales, SW , Engineering and Operations teams to provide a competitive technical solution to build the budgetary proposal to be presented to the Customer. The ultimate goal (to be accomplished as a team) is to secure the design win for XX while matching Customer’s needs. RFQ processing lead-times have to be provided within ****** internal guidelines. MAIN DUTIES Application main duties are:  Feasibility analysis and solution proposals for Platform-ASSP, SoC-ASIC discussing with Customers architecture requirements and related trade offs.  To ensure Customer’s requirements are investigated to determine product applications, problems are investigated and resolved, and technical interface between Customers and Engineering. Drive technical discussion with Customers during RFI/RFQ phases & attend to Design reviews with Customers, especially in relation of specific XX’s complex IPs (uP Subsystems, PLC, Metrology, RF)  To coordinate BP preparation (technical part, effort etc.), in line with ****** quotation procedure, providing for ASIC-SoC opportunities also input for CS generation, consolidating CS including IP-section for final Sales tuning  To provide, develop and foster enhanced interpersonal relations with personnel (Engineers, Managers…) of key Customers to improve Customer relations, resolve technical issues, etc. to position XX as vendor of choice.  Technical product presentations, Evaluation Kits & Products demonstrations during the discovery and advocating process. Demonstrate Product-IP capabilities with related Product-IP Evaluation Kits & demo systems.  Contribute to Evaluation Kit Specification, design and validation (MRD/PRD process, PCB Design, Ev.Kit productization, Collaterals generation)  Support Field tests and Certification process for specific IP-Standards  Support Customers benchmarks  Provide Customers feedback to ******for new and emerging technologies, as well as competition information  Support of exhibitions, road shows and conferences  Identify and assist in research of Sources of IPs  Identify and assist in research of Sources of Technologies/Foundries  Develop technical Product and Evaluation Kits Collaterals (Manuals, System Solution Application Notes, White Papers, etc.)  Develop training & Collaterals material (Presentation for Sales EDUCATION & EXPERIENCE The Application holds a degree in electronic engineering or physics. He/She has at least 5 years experience in the same or equivalent position or relevant Eng. Experience (HW, SW, System) Strong semiconductor experience is a must.
作者: ranica    時間: 2012-2-15 03:41 PM
职位要求:- A- i5 a9 X) S; S6 d* m+ L
SKILLS Essential:  Team working.  The position requires an understanding of: o SoC: Processor architectures, AMBA bus, Standard Ifs ( USB, Eth, ) o Application experience in complex SoC/ASSP, including embedded SW, in relation with meter and communications aspecy (PLC, Rf-Wireless communications, Metrology, etc_ o ASIC Flow  He/She has got work experience as FAE, ASIC Design Center Eng. and/or ASIC-IPs Design Engineer. Desirable:  Work experience as IP and/or ASSP Design Engineer  Telecomm experience on Wireless and Wired protocols (RF, ZigBee, IMS-Industrial, PLC, etc.) from Physical Layer to upper protocol (MAC, Adapation Layer, Newtoking)  Knowledge of sales and marketing principle. Specific interpersonal and communication skills:  Working in an international team  Close Customer relationship, strong communication (verbal, written) & presentation skills including the ability to conduct business in English.  Effectively work with others including Customer and ****** colleagues (Organize and prioritize work activities in an independent manner).  Enjoy working across multiple geographies and cultures.  Traveling within Europe and outside Europe will be necessary. BUSINESS METRICS & SUCCESS INDICATORS: The success of the Application Eng.’s is measured in accountable terms on business-related parameters as: • Yearly Design wins • Bookings Furthermore the other key parameters and indicators to measure his/her success are: • Influence on IP & product definition • Support of collaterals generation ( manual, Application Notes, White papers) • Support of IP validation and certification • # of design wins versus processed RFQs • RFQs proposal lead times
作者: ranica    時間: 2012-2-15 03:43 PM
招聘公司:A communications chip company
; h" V0 m" c  M; ?* W/ V招聘岗位:对外合作经理7 S* ?1 F. p; N( l9 s( {, ^
工作地点:Shanghai! l9 ~3 r1 @# d4 k4 S
6 T* h* I+ r/ V- ?+ b5 |% a
岗位描述:% Z) ~6 u+ O1 c0 y. L. x
职位主要职责基于现有的产业链定位,挖掘和识别对外合作需求;组织制定对外合作计划,完成合作项目调研及评估;组织完成对外合作项目合同起草与商务谈判工作;组织完成对外合作项目计划、执行以及监控等工作。+ Z* q2 f* U$ z/ Z

& B" _5 j) @0 a& s# C职位要求:
! v1 Q: W$ V! J( l. @4 X% S. M3 J6 h, f必备知识、经验及素质本科及以上学历,通信、电子、经济、贸易等相关专业; 精通通信移动互联网行业知识,5年以上相关行业工作经验,3年以上相关岗位工作经验;精通项目管理知识,拥有丰富经验; 精通商务谈判;
作者: ranica    時間: 2012-2-15 03:44 PM
招聘公司:A communications chip company) v. M) L0 U! t8 ^
招聘岗位:战略管理高级经理' f7 T! }7 G( @# c
工作地点:Shanghai
; f3 K6 |6 e/ T: V  ^2 k2 E) A0 `; T7 O- [
岗位描述:, m4 j+ x  }! o3 K
职位主要职责推进公司的战略研究工作;推进公司的战略规划制定和调整工作;推进公司战略实施工作,配合推进公司以及公司控股股东的重大对外投资/并购项目。
6 w6 D  M% P% w4 o2 c# d+ L
, {  f/ C: D9 ]% A3 X- z职位要求:
4 J. M3 N/ y* M6 O技能标准熟练应用SWOT分析模型、波士顿矩阵、价值链分析法、波特竞争模型、平衡计分卡等战略管理工具来分析研究公司发展的内外部环境及经营策略;对移动互联网行业有深入的了解,熟悉整个产业链的运作规律;较强的分析、协调、逻辑判断能力,对各种信息的综合、总结能力;较强的团队协作,上通下达的协调能力。 必备知识、经验及素质本科及以上学历,工商管理(战略管理)、金融学(投资银行)等相关专业;5年以上战略管理工作经验,相应岗位3年以上工作经验,掌握战略多个模块管理及操作流程,精通某一专业领域知识,全面了解移动互联网行业;诚信正直、敢担当,善于总结和传承。 行为能力有很好的计划和执行能力、善于学习、总结。
作者: ranica    時間: 2012-2-15 03:44 PM
招聘公司:a leading developer of advanced digital imaging solution, Y- h7 H8 ^7 M3 f/ q0 S# `
招聘岗位:Marketing Director
" {: t* R4 L# G7 r. X! N: F: {工作地点:Shanghai" B1 s7 d: l6 k; U) b; {

& z0 u& v  i( V& l- S8 D岗位描述:4 \2 ]& }- q2 ?  O' y
Responsibilities: Ø Responsible and coordinate with Sales/PM for China forecast and pricing strategy, new product trend; Ø Responsible for all marketing and business strategy in driving growth within the China market. Ø Ability to define product roadmaps and positioning, and market development to meet current and future market requirements; Ø Strong ability to market to tier one customer and to grow business through strategic partnerships;0 U! ?+ Z; }; _. a1 {

4 [- g1 k7 f" x$ [4 e7 s职位要求:. g) D" N! h+ ?& j, a, T5 ?
Requirement: A strong passion for driving results and excellent collaboration and communications skills required. Ø The ideal candidate will be a dynamic leader and strategic thinker with a strong understanding of the imaging sensor marker and technologies; Ø Strong verbal, written and communications skills are required in both Mandarin and English; Ø BSEE/CS and 7 years cell phone market related experience is required; Ø MSEE or MBA preferred.
作者: ranica    時間: 2012-2-22 03:08 PM
招聘公司:A famous IC company4 t4 E  U$ \' W7 D. M$ x- n0 Q
招聘岗位:Sr.Application engineer+ b; R  l1 ^7 l# T8 F7 m. F1 U
工作地点:Shanghai# b( `6 _2 k+ ~- i! n* l1 M$ W
3 t7 X, t* N, Q9 y7 W7 F) c
岗位描述:
& Y& p+ @/ n* X6 }" ~1 E. h! zJob Description: ) d5 o- e# l+ i# D6 l
1. Report to Product Line directly to provide 2nd level customer support.
+ W9 k# |, {; Q1 m1 c2. Operate Oscilloscopes, Spectrum Analyzers, Network Analyzers, Signal Generators and wireless communication stations for customer Power spec ,RF Test, EMI issue support and make nice training for local FAE and customers. 1 K- o; D. f3 y
3. XX Existing RF DC-DC Application solution and complicated customers' issue debug with FAE. - h- M: i( [/ K5 A& P
4. XX RF DC-DC SCH&PCB system design review for Asia key mobile customers.
% z& T4 Z6 x; {5. Creative application circuit design for key customers' specific demand and PL’s maintenance new product definition.. C. f- e1 b  d7 g
6. Generate test report and application notes in both English and Chinese
% l3 z; a# j% ~$ t9 A" J4 p7. Define Fairchild next generation RF Power product from smart phone system and wireless communication standard’s evolutional perspective.
作者: ranica    時間: 2012-2-22 03:08 PM
职位要求:) L3 W6 f8 k& M/ [- Q
Job Requirements: ! Y, s! l6 U9 o+ }; }
1. Need 4 to 6 years direct experience working related to RF PA's or RF baseband processor in cell phone design and also DC-DC regulators knowledge to be effective. 2 ]% Z4 `; l  S; O
2. Need good lab skills to debug circuit boards, familiar with lab equipment and with PCB design capability. " G  v& a' \$ O# b+ w) e2 t
3.Good RF skills with clear understanding for transmission line theory, matching networks and distribution circuits; good understanding for RF active/passive circuits and antenna theory.
" h! M0 O* g$ @: Z+ J0 t4.Good understanding for GSM,CDMA,WCDMA,TD-SCDMA, WiFi, WiMax and LTE standard.
& U( k& q( E3 v! [) S5.Be familiar with MATLAB, ADS and other microwave simulation software is preferred;
5 S9 D( e8 a1 y& N1 d6.Good English communication and documentation skills, good team player.
' n& u' B/ U7 P7.Master degree or above with emphasis in electronics principle and electromagnetic field technology ,excellent bachelor may be considered. 8. Domestic and international traveling is required
作者: ranica    時間: 2012-2-22 03:09 PM
招聘公司:a top 15 semiconductor company/ {3 K: C+ O& k1 o2 @) j2 h! q
招聘岗位:application engineer) R  b( a  V* u5 X+ u+ d7 ^5 N' X
工作地点:Beijing
+ h; O2 V9 ^. B- r% T7 |/ f! a: J
  }& C3 j& z" ?  j  F2 k7 z9 K岗位描述:3 G/ d& u& `7 p# U  T* p
Responsibilities: - Responsible for providing technical support on Analog Devices Linear product portfolio to Asia customers. - Responds directly to customers on technical inquiries initiated via Email, phone or internet forums - Interacts on a global basis with Product experts and the entire global Technical community for escalation and ensuring that enhancement requests or other issues can be addressed - Understands customer's technical needs and problems - Provides support based on differentiated service level agreements - Applies Signal Chain and solutions/applications knowledge for cross-selling and part recommendation - Collaborates with Sales and Frontend colleagues on new opportunity identification - Attends online seminar, Trade shows and seminars for live customer or other product demo support on request - Deals directly with technical contacts from our Distribution network to support them with trainings and their customers - Contributes with technical inputs to self-service tools and applications provided to our customers
( E/ M: v; q! U! e2 ~4 m: `! R$ M8 {( W" O0 g
职位要求:! n9 y6 m( M3 B, v+ Y( W9 O+ g/ x
Requirements: - Solid analog, digital and mixed signal processing basics is required - Any of below skill and experience is preferred: Power management circuit design experience Embedded software development PC software development capability - Good English skill. - Good communication skill and team work. - 1~2 year working experience. - EE Bachelor or Master degree, master is preferred.
作者: ranica    時間: 2012-3-15 08:06 AM
招聘公司:A famous IC company
; z# ~& O/ O8 Y招聘岗位:LTE Full Stack Test Engineer, b8 X. Y; o# F6 `+ R5 O: n
工作地点:Beijing
: \9 }4 |" q5 @4 x: R3 N$ Z" w! {. p3 K1 E
岗位描述:& O( s0 f7 ^+ e/ l/ o. B
1. Design LTE full stack test cases based on requirements, including writing the test specification. 2. Develop test scripts based on test instrument, especially on Anritsu’s 8430/R&S’s CMW500. 3. Set up LTE full stack test environment and perform testing on target platform. 4. Analyze the issues during testing and locate the root cause. 5. Provide the effective test report and test result with high quality. 6. Cooperate with developers to fix the bugs and verify the bugs. 7. Support developers in earlier phase and later phase.
作者: tk02561    時間: 2012-3-26 03:30 PM
招聘公司:a worldwide leading semiconductor capital equipment provider
+ P4 E- ?6 d/ K招聘岗位:Senior Electrical Engineer8 y$ N2 [& u" J- v* |# s/ C1 o
工作地点:Shanghai
" P" x. g: e/ P) r% ~1 l. D4 ^' V; Q' G8 h6 l" m( h
岗位描述:
5 ?9 `* r3 M8 s6 Y/ l' p  L-Low Noise analog circuit design -Motion Control Systems design -Prepare documentation such as schematic diagrams, test procedures, theory of operation,purchased part lists ,instruction manuals and related information -Maintain current knowledge regarding new developments and trends in applicable field
2 E: S. y5 z$ X% c$ Y+ t' n2 @& p2 O; F% [9 o- h8 l5 o
职位要求:$ s# N" i3 D+ t; v4 f0 S
Selection Criteria: -Knowledge and application of electrical engineering principles, practices and techniques -hands-on experience in using Complex Programmable logic arrays and microcontrollers -strong hands-on electronic design and troubleshooting skills -familiarity with OrCAD Schematic Capture and Layout design tools -Solid C/C++ and ASSEMBLER Programming skill -Excellent verbal and written communication skills in English Education and Experience Required -MSEE or above -At least 5 years in analog circuit design experience related to instrument controls -Working experience in Semiconductor equipment industry is a plus
作者: ranica    時間: 2012-4-9 02:28 PM
標題: RF-FAE
职位描述) `8 K# p, r& U4 w* z. P
Delivers technical expertise, application support and design services to customer based on XXX RF products for mobile terminal and infrastructure area.
+ p- D* R1 o4 g+ D8 N- TUnderstands customer’s requirements & problems, recommends components solutions to meet their needs, and ensures customer satisfaction. 3 i9 T+ F4 d- X$ s$ C  j
Able to provide circuits debugging, simulation and EVAL boards modification for the customer 9 E- ~; d, q) Q! d6 n+ G
Integrates XXX products into customer’s environment. Ensures the product functions per specifications. , p3 u7 ~* x2 C- w
Deliver training classes and consultant services to customers and channel partners. 8 V% k' i# {( D0 y- H# n
Work with division marketing team to implement market strategy in China, collect/analyze market info and involve in new product definition.- D/ T& t" i2 P. i1 _+ j. S4 g

9 j; Z" D: \8 A& u1 R9 f/ O: y职位要求
4 v( |  h- B* K3 L( E/ a$ YBachelors or Master Degree or University Degree or equivalent, major in Electronics Engineering or relevant.
6 X2 Z1 t: Y, z+ r# BA minimum of 5 years of experience in RF circuits design /debug or relevant experience. Expertise and experience for (EVDO/UMTS/TD handsets design) is the plus.
" \5 _' m/ w, {6 K8 t. _$ s- m6 KExcellent interpersonal skills and teamwork.
& r: t6 k# V7 {5 |Excellent command of English. " d5 q2 X7 j; s& N+ q- w) P) d
Available for both oversea and domestic travel.
作者: ranica    時間: 2012-4-12 10:17 AM
標題: Costomer Sales Representative
客户 A famous IC company  v: s8 i3 R' ~" R* w
地点 Shanghai) G5 p( [7 e- Q1 Z& f7 L$ I/ I# Q

* @2 e$ b/ S5 D; C职位描述: p; i- {7 Y3 z& U0 |
Purpose: The primary objective of this role is to support sales team on tactical customer interface, sales reports, revenue analytics & miscellaneous administrative activities.
6 D% L$ B0 \* G2 h1 O- @1 p
  L1 u4 E- {! \6 @" G Key Responsibilities / Job Duties:* q5 X$ T: {1 ]2 k) V% s% ^# K
¨ Sales support
& |$ {0 {* L2 L: v 1) Independently follow thru sales leads, data entry into system for design registration (Model-N)
/ Q) A$ P/ S- i9 h3 |% ?6 x7 E 2) Produce leads analysis based on the lead trend data from given distributors and / or Key account sales
+ F2 @# v$ U0 D2 `0 Q 3) Support sales team in quotation phase, pricing follow up! @( l% E3 n, m4 [. O. }1 a/ r* @- q, {
4) Support Ship & Credit, and check shipment & terms compliance+ j# p& c  q: r0 G/ N" o8 N
5) Monitor DSO of key accounts and alert the sales team when needed
6 t- d4 H" u7 \2 v 6) Support samples request process: Y% V; Y$ V! H9 V* \3 z7 G) O; f
7) Process RMA and / or follow up QA reports status7 l3 R/ o8 n3 j
8) Support global transfer business tracking.
* {: C5 t& ~4 ]% Y+ M 9) Support SAM / TAM conversion& F9 z; h! V, J7 D* m
10) Capture revenue at site locally0 ?" ?) c% a9 Y4 {+ E, a% b. N
11) Work with our customer service team) n" y3 E* I: M' [. I. k2 V
12) Support local sales team daily business operation
作者: ranica    時間: 2012-4-12 10:17 AM
¨ Administrative support
$ e, G+ t3 t& t 1) Maintain office facilities and environment
' h, [. Z; n5 c! Y6 r7 L 2) Business cards printing for SH, SZ, Beijing office staffs
7 M) S1 b: n- m+ n& ^ 3) Update staff contact list for SH, SZ, Beijing Chengdu office staffs, x( a/ n* g( f. \, ]. w- `
4) Office expresses (couriers) arrangement including receiving and posting shipments
# f4 O1 b( _: K& y 5) Assist exhibition, seminar & Marcom support4 D8 s7 j9 ]: x5 E" f
¨ Accounting support1) Print bank statement and collect the bank related payment slip
8 o; Z) K; y3 s2 Q( m 2) Petty cash handling7 [- }# }! g5 E
l Assist to refill the office supplies and refreshment/ R9 ~6 s7 @# r, s
l Handle the courier payment and the custom fee1 p7 P- a4 d* S
l Keep the petty cash in the safe box, prepare the summary to finance and send the original documents to HK office by each month end.
2 `' h5 [+ @3 M/ B 3) Arrange to send the office payment records (receipts) in Shanghai office, such as office stationery, courier fee, management fee and office related expenses., g* q8 J+ ~% \# T+ Q& a0 ^/ v& E
¨ Any other duties as and when assigned- k' l) M. |5 l1 F: x' @
0 s8 T& `* U: _5 b) y+ U) W
" Z3 w/ L9 B, C, Q, K
职位要求
+ Q) r7 ?1 g, B/ AKey relationships / interfaces:& B; V1 A; c. D) L, T
Internal – Local China Sales Team, Channel Sales Team, Management, CSR team, Finance Team (Hong Kong) & Administration Team (Shanghai)3 o: _: u6 k( N7 J( y4 j3 {: V
External – Key accounts customers & distributors$ u% u1 @! p, a" ~# I

" H4 m$ m% q. ?0 e- n+ V; C7 j& j9 ` Requirements (Mandatory)0 Q9 @' p6 S7 \. b( D
¨ University, or diploma in business administration or equivalent; with semiconductor working experience is preferred; Minimum of 2 years’ of CSR or ISR working experience. 8 A9 I2 \, A7 _
¨ Secondary education with 8 years of similar field working experience8 E7 M: P  p& D6 [; S% C. K
¨ Microsoft Office operation is assumed by default) \1 N  C+ p5 ?" A+ S$ y2 C
¨ Excellent presentation skills to clients, fluent Mandarin & English are a must.- d. G# |7 f1 t! t. [/ R% i0 T
¨ Knows of CRM system, like SAP and Model-N experience
0 B; x% A% N% p ¨ Lead and data management experience is an advantage
( D( F" N  u8 H
1 A' u5 N( T0 w1 w/ z Attributes (Mandatory)6 j6 U5 F! F1 j! T; |$ L
¨ A self-motivated, proactive & independent candidate who understands sales cycle
* U; X- A$ F9 Y2 Q6 V1 D ¨ Aggressive, industrious & highly energetic candidate, strong business acumen4 h  e& A0 Z  M1 Y, _5 L
¨ Good communication skill, process & detailed oriented, flexible, thinks out of box6 C+ d/ T8 Z1 T$ Z7 A/ }) i
¨ Likes working with data
作者: ranica    時間: 2012-5-14 05:50 PM
招聘公司:A famous IC company
, K5 j8 c) `! D/ @6 d招聘岗位:Senior Software Engineer (wireless)" z$ T4 v' ~9 j  Y! M
工作地点:Shanghai
" p1 k' ~( N# ]* i  ]* ^: M( K) y" }9 |3 s$ |4 |! m' P
岗位描述:8 y& w2 t' t) l% h0 a/ v
XX's products are deployed by the world’s leading electronics manufacturers in devices such as desktop and notebook PCs, DTVs, Blu-ray Disc™ players, audio-video receivers, as well as mobile phones, tablets and digital cameras. XX has driven the creation of the highly successful HDMI® and DVI™ industry standards, the latest standards for mobile devices - SPMT™ (Serial Port Memory Technology) and MHL™ (Mobile High-Definition Link), and the standard for 60GHz wireless HD video – WirelessHD™ (WiHD). Via its wholly-owned subsidiary, Simplay Labs, XX offers manufacturers comprehensive standards interoperability and compliance testing services. Job Description: This job focuses on the software development, debugging and maintenance for the wireless chips/products of XX. The software development work includes embedded software and firmware development. Also this job needs the engineer cooperate with the hardware team on debugging work.
; T8 Q! ?' s) E9 z& m; b5 E3 L( T) J+ ]# S, K! Z
职位要求:! I  G9 C' ?3 [, w
1) Master degree in CSEE , more than 3 years’ working experience in software development, familiar with software development process; 2) Familiar with C/C++ programming language 3) Familiar with embedded system and embedded software development 4) Familiar with firmware and driver development in real time OS 5) Knowledge of Wireless protocol is a plus 6) Knowledge of HDMI is a plus 7) Knowledge of video/audio encoder and decoder is a plus 8) Good command of listening, speaking and writing English 9) Good communication skills, strong interpersonal skills and the flexibility 10) Good team player
作者: ranica    時間: 2012-5-17 02:32 PM
招聘公司:A famous IC company
" v5 _# u+ I* ?7 Q招聘岗位:Product engineer# G; m3 S) b% L+ U' H& W
工作地点:Shanghai
1 {" h8 t$ \7 m8 A3 q1 n: `4 B
$ A' S9 _! j# J) c岗位描述:2 ^% t0 }/ Z: [9 p* W% k
-Lead the efforts to understand root causes and execute on corrective actions for products not meeting expectations in performance, quality or reliability -Perform data and failure analysis for new process yield learning, production cost reduction and discrepant material disposition -Engage and establish close relationship with Test engineer/ process engineer / package engineer / designer for the new -product development. -Evaluate and characterize the new products. -Following up the product verification and testing schedule and drive the project move ahead.
1 a- T2 `% E9 y0 i) E
/ {' Y) Z! s/ a+ K5 l4 }) ^职位要求:
" Y# G" V; S5 s' v! m6 s' K* h! t-Strong semiconductor device physics and testing background.. -Excellent spoken and written English competence. -Good understanding on foundry processes, package forms & testing procedures -Experience in developing test program, Knowledge of Flash Memory & process, Experience in silicon debug is preferred.
作者: ranica    時間: 2012-6-4 02:05 PM
招聘公司:A famous IC company
4 V' [9 D* ~9 G3 H! {3 T招聘岗位:Senior IO Design Engineer9 @9 V2 m+ F+ Q* n
工作地点:Shanghai( X9 U: I$ W8 y  b3 w" ]$ D1 w  C

2 M8 Y% P0 m: q' a/ a7 ?3 H岗位描述:
% |' p- k$ g) S  r; Q3 w1. Experience in IO circuit design 2. Be responsible for the schematic design, simulation and DK generation 3. Instruct the layout designer to design the circuit layout - m4 E& W4 O: `  _" O, G/ {5 K9 }

8 h3 a: Z* y" p( l* l/ E职位要求:
! J+ _. @0 g- d2 R1. M.S. in electrical engineering or equivalent is required 2. 2 or more years of IO circuit design experience 3. Experience of Spice simulation 4. Knowledge of ESD design is required 5. Process and device physics knowledge is essential 6. Strong physical layout knowledge and parasitic component understanding is essential
作者: ranica    時間: 2012-6-15 11:23 AM
招聘公司:A famous IC company
  j4 K1 ]" s2 V, k5 G6 N+ X招聘岗位:Senior Analog Design Engineering
! j2 X4 J8 `. M- g( S: n工作地点:Shanghai; C9 Y) ?4 g1 \* G

& R. p' [9 n0 I2 S/ x. Y0 r岗位描述:, h, y# I0 ^1 e1 E' R' U! _! S
In this position, you will be responsible for: 1. High performance amplifier (low noise, high precision and high bandwidth) amplifier designs and layout guiding. 2. High definition video filter and driver design and layout supervision. 3. Support the lab test engineering on ATE and product test plan and debugging 4. Work with our sales team to support customer with XX solutions 5. Define new products with XX sales and FAE team (some travel might be needed) 8 ^( i- W. w9 r( h6 E2 \

( w  p5 s& [2 p1 R  N( |2 n职位要求:+ ]1 n# b3 w( N; g9 n. \9 E" @
Qualification: 1. 5+ years experience in mixed signal analog design with independent product design/tape-out and mass-production history. 2. Experience with analog video knowledge will be big plus such as video analog front-end (AFE) design experience 3. Strong local open-fabrication process knowledge 4. DCDC power product design experience is big plus but not necessary. 5. Good at English speaking and writing to work with XX team members in other country.
作者: ranica    時間: 2012-6-22 02:24 PM
招聘公司:A us company
" E# X% V3 ~5 J招聘岗位:生产计划/物料管理
& d# T6 v2 a5 |' ^0 o+ S# E' U工作地点:Shanghai
/ G4 s* i) T5 \1 I' k) m7 k/ e' F2 o' O) u8 s3 ]% ?, y
岗位描述:
, l3 h3 [% [- b; n负责IC 的计划和生产管控, 跟晶圆厂,封装测试厂沟通,熟悉整个IC生产的具体流程 1 ~8 B( g( ]: Z3 y# N% \1 ]
% \! a/ z0 z* ^. H! `% J
职位要求:' V& e- k; D# D* d
1. 根据客户订单和预测制定和维护主采购计划,采购原材料并安排相关加工进度 2. 根据交期的要求有效的监督采购生产的周期并完成发货 3. 收集各项研发数据,测试数据,及时反馈各项信息 4. ISO审核的全程跟踪
作者: ranica    時間: 2013-5-15 03:39 PM
技术总监2 p& M& p. Z0 B2 A; \
客户 A Integrated power development company' d# _# T& W+ }# I: Y/ e; C
地点 Shenzhen
, y/ U, S+ [/ i1 b' T8 n# P, p# ?( a. |! Y) ]& m6 S* V) o
职位描述
5 G8 U: |2 w: y4 P( K8 B岗位职责:" [% l2 S9 H9 X. V+ j
1.负责PMU芯片团队;
0 G2 y- w$ x6 O$ X2.负责开关电源团队的技术架构;7 g  \# H; [+ H4 K6 t
0 u6 }% A# `" A5 ^" A0 G
任职要求:
$ l: d! P4 A: _9 Y; d( a" x' d1. 熟悉PMU开发;, |5 D; w3 O5 X  r
2. 熟悉开关电源类芯片开发;
( ^0 T+ ]1 t6 |* k0 v# l3. PMU芯片开发经验,开关电源芯片开发和电流系统架构经验。
2 J4 H4 I( B6 M* ~+ m4. 电子相关专业领域培训,计算机熟练,熟悉相关绘图测试软件;4 y8 q4 P- k9 M* r: O6 B$ c; ?9 K
5. 英语熟练。
作者: mister_liu    時間: 2013-5-22 02:28 PM
资深 IC设计工程师 (架构师或IC实现)
9 z3 U4 L9 v1 G0 }, \公      司:NO.264-A global PC leading enterprise; @( ?9 Z8 ?- d
工作地点:深圳
2 H0 M# W6 F# K% }, E5 C, C' ^" K' \- M# }) h) a' {, d0 z: D& M
工作内容: , v2 A- b/ t) t" q  P8 q
1、参与需求定义,并设计系统整体框架,承担方案的详细设计,代码设计和仿真工作
" ~: Q. l% H: e3 L2、制订开发计划,调配部门资源,保证项目按时保质完成 " P% R5 [7 o$ X
3、确定验证方案,安排资源完成设计评估! n; x' I- S$ L7 `

. V6 F7 E/ I6 N% {职位需求: # P' `( }0 `* J  R3 Y3 \+ _
1、电子工程、微电子相关专业硕士8+
/ Q- K6 G* p- [+ l& E2、熟悉IC设计开发流程, 熟悉计算机编程语言,熟练掌握verilog语言。 ! L3 q4 z  m0 V" d: D8 t: R
3、熟练使用Synopsys公司的IC设计相关EDA软件,特别是综合、静态时序分析、仿真验证 & c( F7 w8 t4 ^3 l- q; G8 @2 B3 Z
4、三年以上大规模数字集成电路前端设计经验;至少经历过两个以上完整地芯片开发流程中的设计工作; 2 ]. A2 c5 A: i8 n5 r0 x
5、熟悉ARM体系架构,具备SOC设计实现经验优先 4 Y3 n, e0 c  w; G$ `
6、掌握数字电路结构的功能和特性,有较强的理论分析和钻研能力
& h1 a0 \9 [5 ~- [. a* B7、有良好的团队精神,较强的沟通能力
作者: ranica    時間: 2013-6-7 05:31 PM
Sr. Systems Engineer5 x1 I) O4 h$ X- r7 ]- C
* e. q+ d6 v  r; ?* P) Q
公      司:NO.54-A famous IC company2 _0 ?( i( Q; G$ ]- o" F
工作地点:上海) P7 b# M( j/ [0 g: w. B
1 T5 r) T$ q3 I) g+ ?  T
Description of Function Responsibility         , T' D. s1 E  j- _' O( c. d- H

7 h/ j) D9 y! h0 B, x" t! m; W- The Sr. Systems Engineer will be responsible for Ethernet switch chip definition and bring up. In this role the Sr. Systems engineer will engage with the algorithms, system, and digital design teams, to prepare for initial silicon bring up and performance evaluation. Feedback of chipset strengths and weaknesses in early silicon bring up to prepare for production silicon is also a key aspect of this role. This role includes ownership of chip initialization parameters and procedures, integration of hardware and software, and conducting system level performance tests on Ethernet switch platforms. In addition, the engineer will provide product related technical services and support, including: product specification assistance, debugging and testing of customer platforms, and product training for customers and internal development groups. The Sr. Systems Engineer will also generate system architecture and application notes detailing system solutions for current and future products. ; g. T. Q9 |* `$ ?( y! j
, E! J. n. c, x* e
In this position, you will be responsible for:  
5 a3 I: o1 N3 p2 P7 G1 d-        Participating in definition and specification of system architectures.
0 f3 t( o5 ^, ?. \+ P- Independent review of optimal switch system parameters and configurations and identification of performance bottlenecks. ' x3 J$ g1 _/ m
-        Providing design through system-level acceptance testing.
6 O: ^. V% ]) g7 \5 N! B* K" V- k! I/ b-        Schedule test plan and finish on time   
+ C$ F6 `: X* o& k& _. q) `) t7 H' m-        Review of test coverage for silicon characterization, board-level reference design characterization, and software performance testing.  4 {% k+ b3 k- |1 T
-        Responsible for board design test plan ,test methodology and test cases for demo board 0 M: X, y& u8 y; H7 T( X
-        Perform emulation and silicon testing for Ethernet switch system chip  
7 l$ H' {( r0 u& w5 b- q& q-        Analyzer test data, result and submit test report . m# N1 l- K( W7 ~' K8 h
-        Responsible for framework and maintenance automatization test platform
6 V" f! B7 C7 h& f- Providing technical assistance to AE and production personnel related to the use and application of products.
0 L, @% Q9 r1 ~5 E' N( K. T-        System level analysis of customers'' designs.  
( O* S2 |1 m7 V-        Writing technical documents
作者: ranica    時間: 2013-6-7 05:31 PM
Education:        MSEE required " F; l8 [) \; d" E: N9 {
% {6 O- q  M4 |; x. I
Experience:         
  z4 N# Q! |* j) p, N-        more than 5years working experience in related field 2 \2 G2 ~- N, g, _; b/ {7 K3 \
7 i2 t/ p* E: t- U( ?1 `/ N9 q; }
Requirements:         
" d# G* v( _, z- }- W-        MSEE required 9 s$ ^, j5 ~* `* ~
-        More than 5years working experience in related field  % P9 J" o  m* o0 `9 r
-        Deep understanding of switch/router architecture and requirements. 7 u$ A5 k% O0 f) W8 K1 N$ H
-        Familiar with Switch acknowledge and standard such as IEEE Std 802.3 ,IEEE Std 802.1* and so on. 0 T, {+ c& D7 t
-        Experience in GRE, tunnel, MPLS, VPN and DCB feature.  . s: }' ?. |+ C% u
-        Experience in routing , bridge and network test.   8 q8 K8 X; Z5 j. L% l
-        Experience with ASIC emulation and silicon testing  
* t" D# B6 i$ o' B-        Familiar with IXIA, SmartBits and other networking test equipment. . Y( p. T( h% R/ k: s$ U7 z
-        Strong problem-solving skill to isolate and resolve issue   5 Z) A1 `) x0 E$ F1 L# {  F0 @
-        Good communication and interpersonal skills
0 b4 I/ o1 q8 m8 R- B; j-        Self-motivated and quick learner
作者: ranica    時間: 2013-6-13 11:03 AM
软件工程师) o4 ~5 i0 C. O1 \8 S4 T6 J4 h
% B; w9 o  ^( O7 A4 }
公      司:NO.120-A famous IC company
% ?5 @5 b' V/ J工作地点:上海
; ^0 [  J( h/ n& l! `
& q( z3 _9 N9 n2 G, U/ Z主要职责:
+ B$ R* R* j' A1、根据产品应用进行功能设计,并且实现相应的程序开发;
. `/ O8 E* E8 g/ ~' l/ g2、依据项目要求和相关规范,完成系统的详细设计和相关文档的编写; * O8 n- z8 j- a: f
3、根据项目要求和编码规范,完成相应功能模块的编码任务;
* {, W, ]# e5 c- ?$ `4、根据项目要求,配合项目人员完成结合测试、系统测试和系统交付等工作; ! B. Q9 {0 a8 [% j- K6 E& H, {) n
5、实现系统关键技术研究和开发,以及系统技术预研和系统原型开发;
: }! Z0 ?) ^) }* {# m7 P6、解决各种紧急、疑难、复杂的技术问题,为客户提供技术支持。
- N3 d; P7 g1 z% G( U
3 q9 C9 f$ `0 q; t) f- ?9 J6 A! |职位要求: . t( [+ l3 N$ Y5 P$ k0 l
1、本科及以上学历,通信、电子、计算机、自动化及相关专业;具有两年以上的软件产品开发经验;
: d5 w0 ~8 k* _2、熟悉C和C++程序语言,具备实际开发经验,能独立开发应用模块; 5 m5 q4 X( W1 Y* ~
3、熟悉VisualStudio、Windows API等设计开发流程;
; C1 d9 X8 `' ]8 [4、熟悉面向对象系统设计与开发,熟悉常用数据结构和算法;
% q" M1 a5 w# z  i! }# H5、熟悉网络编程、多线程编程、应用服务开发; / i# q, F+ i0 |6 Q8 m2 d% }
6、精通软件开发过程规范,有很强的软件开发过程评估和控制能力; $ w6 c  ^" p) x8 `: R: M
7、具有团队合作精神、责任感强、良好的表达和沟通能力; ; H5 X. h7 j1 o# O* J5 H
8、能主动学习新知识,对工作中遇到的问题能寻找解决办法;
' d- ]* a  s2 y; W. _" p( Z9、拥有半导体行业工作经验,具有Linux平台开发经验,熟悉makefile,gcc,gdb等开发工具者优先入取。
作者: ranica    時間: 2013-7-2 10:07 AM
系统/应用工程师[系统编号:2 s" O' n* b" z* y0 l7 S4 ]
公      司:famous IC design company in shanghai
* O; {& C3 K2 w" ~工作地点:上海
* B& g3 b' _# j* d1 _3 v# i4 |& b; S# _$ a/ f
主要工作职责: 3 @/ r; i% ]7 y) p
1.        负责笔记本、电动工具、电动自行车等锂电池保护系统的软硬件设计 0 Q' E4 U* s; \+ @# ]
2.        参与公司锂电池计量和保护芯片的新产品的系统开发、设计及验证 & v1 R  \* C' V, t
3.        制定产品规格,就芯片原理及关键参数等技术问题与客户交流,了解客户真实需求
2 h3 ]; R, C! n% `# K! }8 [4.        配合设计人员完成芯片设计,提供建设性意见
) S# k# ?' F$ \  T2 `, j9 L5.        制定芯片验证方案,完成芯片的系统验证 . g6 `$ Q7 h6 \$ Q6 q
6.        针对公司产品设计应用电路、编写应用软件、整理应用笔记等技术文档
, Y! d2 \2 T- M( s* w3 D1 e7.        研究锂电池容量算法,提取满足客户需要的容量模型
1 k/ o0 [" z- X4 j+ B: M' s) Z1 k8.        进行内部员工培训,为FAE提供技术培训和支持,
; F0 T) i: L0 g/ A9.        为销售提供技术支持,解决用户遇到的技术问题
作者: ranica    時間: 2013-7-2 10:07 AM
职位要求: 5 X; B3 o" T( o
1.        计算机、电子、微电子、通信相关专业本科及以上学历; 0 O2 b: f5 {6 B2 c3 s: i6 ^
2.        3年以上芯片应用经验,曾参与或主导锂电池计量或保护芯片产品的设计。
3 ], Y, u- a; k; B( e, Q8 P3.        了解笔记本、电动工具、电动自行车等应用系统的电气特性
7 m! ^& P8 G) ~* z4.        了解锂电池Cell及Pack特性,对锂电池容量模型具有一定了解
2 M. v' Z. k' n( [7 Q5.        正确理解Spec要求,可独立完成Spec的制定和芯片的验证工作
  Q2 |6 \* h% W5 d  X2 x* ~6.        精通嵌入式软件开发,有一定的C/C++编程语言经验
" n* [7 s  S) y2 {& y7.        丰富的电路分析、设计经验,熟悉常用的电池元器件的应用
2 m% d2 n; T- d1 P" @- b) P5 _9 w8.        良好的沟通能力,可正确理解客户的真实需求
$ D5 d  b9 u/ u$ v3 t1 {# W3 Z9.        认同客户导向,可快速解决客户问题
- w/ s  i9 \. ^# Q4 s# J5 U10.        具备良好的读写与英语能力 ; |" `$ _! Y% L) f4 ^$ W
11.        积极进取,良好的团队合作精神。
作者: tk02561    時間: 2013-8-7 04:32 PM
Production Engineer% {+ \. v2 w& b) j3 I7 ^7 o

7 `# K2 w4 \3 b% m! x7 l  Y0 a公      司:A famous IC Manufacturing company
# c# H6 r2 `" _9 A; D工作地点:深圳
3 E5 [3 W- t" Y( U6 D5 F7 d2 q
6 O+ p- Y9 r! i* K; `Job Responsibilities  
0 B0 Q. W& z' B* P9 m2 a        Performs the initial on-site failure analysis effort for both electronic and process related defective products and provides the root cause and technical resolution.   
/ U  Z# F! f- Q5 {9 ]) M        Owns the transition of new designs and the subsequent production of SBU products in China. Collect and analyze testing data, lead failure mode analysis and find root cause. 9 U+ p, v. J6 p$ h! @% f
        Oversees the new product reliability and qualification processes.    6 ~2 ^% L/ N' Q
        Evaluates and proposes cost reductions  2 G, [6 `' q4 N; F  b- a% T* |- m
        Evaluates risks and assists in the resolution of any problems that threaten SBU ability to meet production delivery deadlines, including sustaining issues. - p$ u  o5 I9 z
        Fluent with the set up and maintenance of product test stations   
* r3 @/ e' n7 U! |$ C9 r  n, d        Owns creating and updating test procedures to support new products.  # w9 _$ k- F9 @. a  k/ ^6 _
          Owns sustaining efforts of all current production models.Maintain effective communication with  SBU team in US sites to understand product and engineering specifications.
3 c+ ~8 d5 j0 a1 }/ f
3 b& W% x  ?! {) XSpecifications  
0 T# l# G' U/ |! U        Must  possess excellent communication skills.  Must be able to speak and write both English and Mandarin well.
/ j5 e% W8 r! \8 f# Q2 w        Ability to identify design problems and resolve them with an emphasis in electrical design.  + U. r# r0 T) Z& g
        Must understand the production process from procurement of piece parts to the shipment of finished goods and be able to communicate across multiple departments within a contract manufacturer. & C3 z) z6 L8 Y& R( x
        Strong self-starter, self motivated, goal orientated team member.  
( H5 t0 t: |" k( q        Excellent problem-solving and analytical skills required.  , `' W" s, |2 s* G# h; {7 c
        Ability to work independently and as a team member to accomplish tasks.  ( e! T  E- J0 w, O8 K$ h3 O. f
        Occasional lifting up to 20 pounds.  
% w5 i9 A& t) {        Manual dexterity required in operating small hand tools.  $ O3 n7 E4 Q( \5 Y) W  A$ @0 U. A
        Working knowledge of the use of Signal Generator, Oscilloscope, Spectrum Analyzer, Multimeter, Calipers, Micrometers, Height Gauge and common hand tools.
$ [8 ^( g. z- t( d0 z        Minimum Bachelor’s Degree in Electrical or Manufacturing Engineering and 5 years related experience.  Background in assembly of high volume electronic/electromechanical products required.
' {, W" J2 b' R9 a7 T* P& |  
& w' b4 {: U7 }9 NAccountabilities  , M- [3 }& X" B, V& F5 x& B' R
        Assigned tasks per agreed project timelines.  
  ^3 |) t! ~$ d1 c9 w& Y        SBU Cost reduction targets  
+ s: |: x: Z& x, n: w        SBU Production delivery plan  
( y6 T, _# n$ j( L) t# N5 s  ( c, \! l* B7 l
Relationships   * _( q5 @$ Y9 q
        Functionally, reports to SBU Program Manager.  
4 X; v; }1 ]) o" t/ s        Administratively, reports to manager in China.  ! x1 m% X. |( C' R* m
       Maintains very strong working relationship with SBU Contract Suppliers.
作者: ranica    時間: 2013-8-29 10:07 AM
Sr. DI (Device Interface) Engineer
1 m/ q: E# {$ [! z, B% E# E; J9 v2 _; F9 w! K/ Q0 ]9 p4 r. s) p
公      司:A famous IC company
# ~# Y' O6 ]! j0 h, ?2 L* [$ k. K工作地点:上海% o! ~' l7 @$ m8 ~) Y0 O

; N% s, ^8 B7 q+ [% o/ sDescription 0 M7 x1 ]. a, o. }2 u( X
As a Sr. DI design engineer in *****load board team, you will be responsible for leading multidisciplinary design and development of load boards supporting ******ATE (Automatic Testing Equipment) in the devices evaluation and/or mass production. In this position you will work directly with FFO (Fabless, Foundry, Out Sourcing Assembly& Testing) customers to develop successful PCB designs for their high performance devices testing. Duties include all aspects of PCB (printed circuit board) design, including electrical components selection, PCB materials qualification, power circuitry design and validation, high speed bus design. You will be interfacing with a cross-functional team to develop board level architectures and implementations. You will also be preparing specifications, design, schematic entry, constraint entry, library creation,leading layout, products bring-up, and debug. The development models vary for these projects - in some cases you will be developing all the design collateral internally and in other cases you will be overseeing the design work at external suppliers, but in all cases you will be responsible for the success of the design implementation. And, the Sr. DI design engineer also applies a working knowledge of transmission line theory and electromagnetic principals to ensure board level timing and signal quality requirements are met. The candidate must be a self-directed and motivated engineer with both simulation and practical skills.
作者: ranica    時間: 2013-8-29 10:07 AM
In this position, your responsibilities will include but not be limited to: 3 V6 U* b" k* ~5 U. \; u
-Performing SI (Signal Integrity), power delivery, and timing analyses of high speed interfaces and power delivery circuitry.! k; P0 e$ u/ ]. S7 F% y
-Creating and executing SI plans for PCB design ; S/ f" D% l0 b: O% G
-Contributing in the board design process which may include owning a design when needed ) R, S8 _& i* p0 z! s
-Perform laboratory measurements and correlation to simulation predictions ! k4 g! ~- `& D3 b2 z
-Generate and maintain simulation decks and models. The models include all the tester module, package, via, trace, cable, connector, etc.
, \/ O8 P0 @. K4 W-Solve SI problems and provide solutions and trade-offs % v0 O2 K) S' S6 n6 }6 [; @
-Apply best known methods for both EMI and ESD 8 x# r1 V% S( X
-Improving SI analysis method and efficiency
3 f0 I* s0 g2 c+ z5 K6 a-Working closely with Application and R&D teams on SI validation and correlation * B( ?5 f  P8 e* K7 \
-Write documentation to summarize results and recommendations
2 ]4 B& b% A; K-Collaboratively design directly with both DI engineers and applicationengineers
9 `* Q* U5 `. x6 c+ H% V! u6 Q( Q- C1 ~7 \0 p: I4 _
Qualifications 6 G2 _; u8 b8 Z8 @6 N" ~( _
Minimum requirements: ( P, \4 v( T  S- |5 `
You must possess a Bachelor or master’s degree in electrical engineering or computer engineering with at least 4 years of experience.
! s. d- M' S) D& F5 Y
. O: r5 k1 N# h7 E5 i1 H; \& QAdditional minimum requirements include: 1 z7 ~; O$ S0 a9 m+ s
-4+years experience with PCB design and high speed design required
: o- B* r& y4 n( f1 e: N9 `-3+ years experience doing design for manufacturability 4 m- s, W  @( {# J7 l: S$ T7 g8 c
-2+ years experience with SI simulations




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