標題: Optimization Layout of ESD:Radio-Frequency Front-End and High-Speed I/O Interfac [打印本頁] 作者: semico_ljj 時間: 2010-6-25 08:55 AM 標題: Optimization Layout of ESD:Radio-Frequency Front-End and High-Speed I/O Interfac Optimization on Layout Style of ESD Protection ' w2 n5 ]( {/ u. HDiode for Radio-Frequency Front-End and High-Speed I/O Interface Circuits * [4 b" I$ P P. t2 {. x, @8 n1 e3 u, Y5 G9 V0 N' e2 _4 K
Abstract—The diode operated in forward-biased condition has been widely used as an effective on-chip electrostatic discharge (ESD) protection device at radio-frequency (RF) front-end and high-speed input/output (I/O) pads due to the small parasitic loading effect and high ESD robustness in CMOS integrated circuits (ICs). This work presents new ESD protection diodes drawn in the octagon, waffle-hollow, and octagon-hollow layout styles to improve the efficiency of ESD current distribution and to reduce the parasitic capacitance. The measured results confirmed that they can achieve smaller parasitic capacitance under the same ESD robustness level as compared to the stripe and waffle diodes, especially for the diodes drawn in the hollow layout style. Therefore, the signal degradation of RF and high-speed transmission can be reduced because of smaller parasitic capacitance from the new proposed diodes. ; N4 G( j, ^1 Y, W: L4 {, a ! L- a3 _% \+ wIndex Terms—Diode, electrostatic discharge (ESD), layout, radio-frequency (RF). 4 B3 ?/ h4 X( G) Z2 p- ^$ \5 U% [2 M; ]0 D( L 作者: jackie0888 時間: 2010-6-27 10:13 PM
pls share ,3q. because i am a emc作者: jackrabbit 時間: 2011-5-13 04:48 PM
讚啦!! 正需要這篇& ]2 V- u: l1 ~* P, O
please