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標題: 偶想請教如何設計出與VDD無關的bias circuit for fold cascode OPA [打印本頁]

作者: mayluli1981    時間: 2010-1-3 08:27 PM
標題: 偶想請教如何設計出與VDD無關的bias circuit for fold cascode OPA
偶想請教如何設計出與VDD無關的bias circuit for fold cascode OPA
VDD=3~5變化
作者: mayluli1981    時間: 2010-1-4 08:15 PM
請問版主
在power ic 中如何給error amp 偏壓或者currrent mirror 且VDD一直隨輸出改變那gain不會改變或沒放大?
作者: tamino    時間: 2010-1-15 09:10 PM
Use self-biasing. You can find the circuit in usual analog textbook.
If the bias current is not proportional to  VDD, the gain can be keep constant.
In ur circuit (on the left hand side), since Vref is constant and then the PMOS would change the resistance with VDD, the biasing current is proportional  to VDD.




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