標題: 「有時候類比工程師被認為是不容易群體經營的特殊才華分子」,你同意麼? [打印本頁] 作者: sunny.yu 時間: 2009-7-28 03:28 PM 標題: 「有時候類比工程師被認為是不容易群體經營的特殊才華分子」,你同意麼? 有家專門從事類比電子零件設計的新創公司,由十幾位本事高強的類比工程師組成。他們大多在求學或就業時,憑自己喜好選擇當時冷門的傳統類比電路鑽研,而沒有一窩蜂地追尋容易的數位工程... # q S! W+ }2 K4 H! R6 b 7 |. ]/ x) y$ p$ k# m9 A作者: huahuagood 時間: 2009-7-28 04:26 PM
感觉Digital 比Analog简单多了~~Analog靠很多经验~~作者: henry90176 時間: 2009-7-28 07:40 PM
恩???來看看不同的論調~~~~~~~~~~~~~作者: ychchip 時間: 2009-7-28 09:35 PM
看個人啦,$ y9 v; s% i4 _2 |
in general, analog ic indeed difficult design than digital circuit. / J. W6 e2 A3 W, o+ ^% _so, an experenced analog ic designer must trainning by 3-5 years, whereas digital engineer sometime 1-3 years trainning is enough depend upon the products properties.作者: juptorwu 時間: 2009-7-29 02:19 PM 標題: Personality is piece of ART work as well Well Experienced Analog Engineer indeed are much more talented than pure Digital Engineer, but every one's personality are quite similar & detailed oriented characteristics !作者: hoodlum 時間: 2009-8-1 11:14 AM
類比數位都需要經驗啦.... 2 @0 M$ u( R; z, {我認為只是差在養成期 . y" f- _& b. ~由於類比的養成期較久1 C9 U( L) q p8 F# Y ?& Z( f' e, E9 o
所以有經驗的類比工程師人才, 1 o0 c- k. o8 z9 T就顯得特別重要作者: pkf690801 時間: 2009-11-20 05:17 PM
.....................................................................................................作者: globe0968 時間: 2011-6-10 09:16 AM 世界環境日前夕的好消息 / u. R/ [' Y8 g3 P& v中時電子報 - 2011年6月2日6 ^2 p' |+ W5 D" T- U
+ B: f$ i4 ]: D8 n* D劉三錡,東吳大學會計系夜間部畢業,考上高普考進入公務體系,曾任行政院主計處科員、專員、科長、專門委員、副局長,教育部會計長、行政院副主計長、東吳大學兼任副教授、行政院主計長、總統府國策顧問、私立育達科技大學校長、高雄捷運董事長等職,現任佛光大學副校長。劉三錡在30年的公職及教職生涯中,充分展現出洞悉事務的犀利眼光,並推動許多影響社會、教育的重要政策,備受各界肯定。 . k# |; e6 d- L( m 1 }- w7 @( f2 M# ]& d ( a3 v2 Y5 ]" n訊息來源:國立台南大學作者: ranica 時間: 2013-5-23 03:32 PM
技术总监8 \! v0 E* T( l+ H
公 司:NO.245-A Integrated power development company; d9 R7 s# ^- X) L
工作地点:深圳' x4 P" F R: b6 I8 }8 t/ J
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岗位职责:* V) h0 E8 W- E8 s; Q4 l6 e/ q
1.负责PMU芯片团队; 0 o2 a8 x+ t R" _2 Z7 J2.负责开关电源团队的技术架构; 2 \$ _( M3 d2 r$ } / r3 k; Z' Z$ u' g任职要求:# P3 O5 }1 m$ ^! i8 b8 m/ H" B
1. 熟悉PMU开发; . L+ C4 `; V* R1 O9 y9 d. l3 B2. 熟悉开关电源类芯片开发; 6 v; @2 Z, P, _. Z' ^3. PMU芯片开发经验,开关电源芯片开发和电流系统架构经验。- C( y- i0 j) d0 Q+ ~% x1 A- \4 Q2 z+ K
4. 电子相关专业领域培训,计算机熟练,熟悉相关绘图测试软件;1 H3 y9 h; ]" ~1 U: U1 g$ r- w
5. 英语熟练。作者: ranica 時間: 2014-7-11 10:39 AM
Field Application Engineer (Industrial Focus)6 s& {& F! k \* O( G! ?8 Q. g8 _, e4 l
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公 司:A world leading analog&mixed-signal IC company3 z: A P( {6 n/ t9 r
工作地点:北京 / \5 e: Y9 Y0 M( |( e & A; m1 f: z" B/ P% EOverview ) J* L3 p( V$ F6 I# {' D" dThis Field Application Engineer will be based in Beijing, joining an elite FAE organization that strives to deliver innovative solutions that add value to ####’s customers. As part of our dynamic FAE team, you will work to develop a winning strategy to grow design wins, customer relationships, revenue growth, and ####''s overall position in the semiconductor market. This position will have high visibility within all departments of #### and requires account ownership and accountability. # H& k- C. |! A; |0 _0 v7 K/ s# m4 G6 E
Tasks and responsibilities # }, h5 X6 w5 E! f" i
· Total ownership/interface of customers’ engineering touch points across all levels to influence design decision. % _* b7 y! L. p L% l3 y6 W+ ^· Implement new product/sub-system solution in key accounts to optimize product mix for sustainable revenue & profit growth. 4 g* b( I( e; W) W" ?% o8 k· Links with BU & Sales to manage design-in/wins for BOM content growth. * ~8 l- V% G" a+ j- P V, O· Assist BU & Market Development teams to fine-tune New Product Proposal. 2 H0 E5 T. l& x5 `. c
· Facilitate roadmap integration between headquarter and Key Accounts. 0 |, z, p, l5 f* K & N& R4 t7 p% HQualifications and skills + b3 U8 `, C; u1 U `8 S· BSc or MSc in electrical engineering or equivalent education. # Y, \$ b4 p0 @7 n
· At least 3 years of work experience with a strong technical background in the wireless telecom industry. 8 ] S6 s, X, H% A4 L# ^) c1 O· Technical experience with signal chain and mix signal devices (ADC/DAC, OpAmp, Voltage Reference, Industrial Power, energy measurement etc.). " ? `8 F/ K& y9 e. g' q3 V$ G· A team player attitude with strong communication skills and the ability to collaborate with customers and peers from different functions and cultures.. ?! v# t' U# Y3 v7 Z7 Y, C: ~7 O7 ?
· Able to influence, motivate, and guide people. ) @5 C. ?6 |9 Y7 Z· Good English language abilities.作者: ranica 時間: 2014-7-16 08:23 AM
RF/模拟IC设计研发总监( @: u3 A9 x6 S$ d6 h9 g6 x3 p
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公 司:A IC design company) t- V: l+ X1 q9 z/ d& k
工作地点:北京+ @$ R( t! N3 m
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职责范围: 2 O7 S+ m& h' w# Z* z7 i
1. 负责研发设计部门日常运行和管理,指导研发团队新产品定义、立项、设计、验证; $ R8 G8 d. H1 o; U2. 负责与市场及销售部门紧密配合制定公司3-5年期产品路线图及相关产品定义; 1 ^& l! Q0 ~" H# [6 i M4 K+ M$ m3. 负责开发芯片系统架构,参考模型,测试计划,测试环境等一整套工作流程; 5 d% ], _0 c! d
4. 负责对多个项目进行人员资源的调配,分配设计任务,加强团队间不同功能的分工合作,提高研发效率; : v; W ?0 Q# \( Y5. 指导研发团队制定产品测试、应用及标准制定及批量生产; - C* W6 T) A9 Y6. 负责与EDA厂商合作确定软件购买,新工具的采用等; $ o- z4 h1 Y* s' S; }7. 负责研发团队建设及人才的引进和培养,以符合公司发展战略的人才需求。作者: ranica 時間: 2014-7-16 08:23 AM
任职资格: % r' C- \4 ^) j. J/ s1. 重点本科以上学历,微电子专业,十年以上相关工作经验,或硕士微电子专业,八年以上相关工作经验; : h* h& i4 ~3 W* ]; M: [' l2. 三个以上从概念到量产的全过程的车用芯片的工作经验,并担任过模拟设计部门经理级以上职位; * R9 D) |0 j9 w3. 熟悉射频模拟电路产品定义、设计、测试、应用及品质控制流程; % q6 A% r8 S- Z* M2 h2 l4. 工作严谨、细致、高效、务实,富创新性思维能力,思路清晰; 7 d/ r$ X& |! P5. 有较强的成本、品质意识,良好的职业道德和职业操守; . ]% }3 V7 ^9 V7 c- g6. 优秀的书面及口头沟通表达能力和良好的团队合作精神。作者: ranica 時間: 2014-8-19 05:19 PM
Project Manager# U+ G- d( E* K3 V
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公 司:A fabless IC design company+ }1 g$ {+ k3 v; C- S, U
工作地点:北京4 c0 @( x ~9 O
8 m0 P& ^9 M5 |0 `Job Responsibility ' w- Z% a! c. i; T% ~% P* BCoordinate sales, engineering, applications, marketing, and operations to drive projects to their successful conclusion. This involves breaking projects up into smaller parts then assigning responsibilities to different business functions. Daily activities include leading meetings (often involving other locations and companies), generating action items, providing status updates, and updating schedules. The candidate must follow up, assist, and escalate as needed. A good Project Manager always knows the status of his project, its current activities, its current challenges, and the risks and opportunities presented by the project. Multi-million dollar decisions will be based on the Project Manager''s analysis and judgment. 2 g& i6 M6 b( C' F7 J7 UOther marketing duties may include market research, authoring presentations and other documents, sales assistance, and maintaining partnerships with other companies, among other tasks., D, P4 ^6 H8 M: T+ N
职位要求 . A, P9 \+ H8 G2 q8 \* v* A ?1 B' CJob Requirement# Y5 U E( v- a0 |# o6 f
Must be fluent in English ) S) R. [& P) |+ i1 m( h' |, sMust have a strong technical background % J4 ~ m6 c% ^7 d5 G9 K2 xMust be a college graduate 0 m2 M) g7 t3 d5 `% KMust have basic Microsoft Office experience 3 k# D* R# d/ ]$ ~' N8 [DisplayPort and/or HDMI experience is also valuable 0 Z9 `; Y8 [5 W; r" ^# J% d. UThis position does NOT have any direct reports.作者: ranica 時間: 2014-9-16 02:07 PM
高速模拟集成电路设计工程师 ) R% t2 e' |7 Q j4 W) T公 司:A semiconductor company; t e" g' {: r% W) }1 @
工作地点:上海& |. {1 D% ]# z* b% i+ P
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职位描述: + ?" v( A( V0 L$ E8 |
1、负责高速模拟电路的设计、开发、优化; : x# p) q( w+ L, B1 ~( s2 U2、版图的设计及验证; ; H6 r# L# g( ~% `* B8 T3、电路版图参数的提取及后仿真; 6 L( u" G3 J5 R4 k5 ?9 K
4、芯片的测试和分析。% R8 Z" d7 r) e4 u8 o
2 `. `- Q& B" ^# B h2 I职位要求: ( M: F7 c% R2 B6 }: I3 b A$ _$ Y
1)微电子、集成电路相关专业硕士或博士学位,或学士学位3年以上模拟IC设计经验; 2 p7 A) O6 c, d$ |( u% D0 v
2)熟悉和掌握模拟集成电路及版图设计的原理与技巧; * G- s1 o$ C7 C
3)有通信系统用集成电路芯片设计和成功投片经验; & z+ R: X) X+ f4)善于沟通、工作踏实、责任心强,具有良好的团队协作精神; . O' b+ w6 J* D! ~: ?8 G/ x1 i
5)有下述项目经验者优先:高速锁相环(PLL),时钟数据恢复电路(CDR),调制驱动电路,宽带放大器,限幅放大器,跨阻放大器等;作者: ranica 時間: 2014-10-20 11:42 AM
IC Product Engineer O2 Q9 B- t. o) K) |. z
公 司:A famous IC company ( [2 b3 }! {% G1 a ?2 Q$ ]工作地点:上海 9 a$ h! q" Y2 d; q% E$ X ( Z3 C7 x8 N# o+ D; v: ]Job Description: 3 r1 J! B# R: G0 Q ?/ r8 R) v1. Leadership role in developing and qualifying the Flash IP to meet the customer requirements ! m4 { r* L9 q! N2. Make significant contributions to design, technology development. Evaluation, development and debug of new test modes, perform data and failure analysis for new process. 8 W/ i# O+ I8 H0 j2 V3. Promptly feedback to Design & Process team if any issues during the verification. 0 T) `3 h, N" B0 z) j1 Q4. Characterize the new products, analyzes and evaluates product spec vs real performance to ensure all parameters within spec.; b! e& k/ O# v9 _+ n* E9 S
5. Engage and establish close relationship with Marketing/ Test engineer/ Process engineer / Designer for the new product development.. N5 i0 h- @' G' v" y
6. Following up the product verification and testing schedule and drive the project move ahead. - w) n+ O# B$ Z0 d5 X/ e* v5 ?& g. J * T* q: R! o' j5 ^2 j! KJob Requirements: 3 Q3 g" n6 d' b; Q- ?0 S" m1. Strong semiconductor device physics and testing background (wafer level, package level). ( N. t! }* I9 t, p3 b2. Good understanding on foundry processes & testing procedures , NVM experience is preferred. $ Y9 w/ L: x* [1 r5 o4 [$ [; C5 _& g3. Experience in developing test program, Knowledge of Flash Memory & process, Experience in silicon debug is preferred. 8 T, N5 ]6 t! n+ H/ a6 _8 k" _4. Experience in Credence PK2 & Nextest Magnum, memory testers, etc. is preferred. b0 j2 X0 ]- u
5. Excellent spoken and written English competence.