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Verilog-2001 added the much acclaimed @* combinational sensitivity list. The primary intent of this enhancement, S% k* l0 m2 r, A, m8 ?
was to create concise, error-free combinational always blocks. The @* basically means, "if Synopsys DC wants the8 |' M) f! C2 v! l6 F9 Q
combinational signal in the sensitivity list, so do we!"- B- v. |2 {. t H8 F
Example 1 and Example 2 show the Verilog-1995 and Verilog-2001 versions respectively of combinational
6 _6 |4 R* }3 C* O! h" T% Ssensitivity lists for the combinational always block of any of the three always block fsm1 coding styles./ `% f9 f. `/ n" x7 L
0 R7 E" ~& v/ C1 w
always @(state or go or ws)
A0 o8 z4 P, Y1 [: _* ? f, ^' `) h4 ibegin
: C) T# D6 }2 q5 r$ O...
/ b$ n* V$ ^6 N3 I- q% Rend
" P3 X0 y" j" Y//Example 15 _; M6 T# X* v% m$ W( Y3 s+ K" t
- u; l) _1 H/ |4 D3 |" \5 `! T
* x3 v# O/ ^9 m: A
always @*" o- h- w9 p4 I8 W8 X
begin5 \3 E/ c1 `& C) i9 @7 N9 A1 M
...
+ `7 W! V# L# Kend) n6 T# t; p, l+ g! i2 r
//Example 2
9 I4 {+ d! l3 W
1 \ n5 J1 ~/ zThe @* combinational sensitivity list as defined in the IEEE Verilog-2001 Standard can be written with or without5 S' D& |0 ?# w$ y
parentheses and with or without spaces as shown in Example 3. Unfortunately (* is the token that is used to open
, Y U) I7 m1 A0 j) n5 b. T: ]6 @a Verilog-2001 attribute, so there is some debate about removing support for all but the always @* form of this
" J# ~, o$ V, J: d' U0 m% ]combinational sensitivity list. In-house tools would probably also be easier to write if the in-house tools did not0 e) v4 t6 }* ?3 N- j
have to parse anything but the most concise @* form. For these reasons, I recommend that users restrict their usage
: h$ I- A' x! f* ~$ Gof the combinational sensitivity list to the @* form.
" z, k6 C" m0 A# A8 j( i9 Galways @*
* U2 t4 v& p! n: p1 k. Ralways @ *
0 n- M9 O# \! K) Xalways @(*)
1 y8 m/ g8 ^; V6 ]/ u# K3 Yalways @ ( * )
5 L3 H8 \% d# v, J//Example 3 |
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