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White Paper: RFID Radio Circuit Design In CMOS |
May 2, 2008
Radio Frequency Identifi cation (RFID) is an electronic tagging technology that allows an object, place, or person to be automatically identifi ed at a distance without a direct line-of-sight using a radio wave exchange. Applications include inventory tracking, prescription medication tracking and authentication, secure automobile keys, and access control for secure facilities. RFID is a major trend that provides fundamental shifts along several business vectors and is expected to be a major growth area in wireless electronics. Details of RFID applications and opportunities can be found in many previously published works. This paper details a specifi c design of a passive backscatter UHF RFID tag circuit that meets the requirements set forth in the EPCglobal Class-1, Generation-2 Protocol [4]. EPCglobal is an organization dedicated to the worldwide adoption and standardization of RFID technology. The design specifi cation sets forth all physical and logical requirements for the tag air interface and digital state machine design. The first section of this paper gives an overview of the RFID system followed by a section that discusses the tag design criteria for predicting range based on the tag integrated circuit power consumption. Issues limiting range, especially the channel electromagnetic effects, are highlighted. Analog circuit design for a 900 MHz tag is the subject of the next section, with specifi c circuit design and results for the rectifi er, regulator, reset circuit, demodulator and modulator circuit. Antenna design and simulation of a simple meander-line dipole tag antenna is performed. The paper concludes with a system-level simulation that includes all of the circuit blocks to predict DC power generation and reader-totag and tag-to-reader communication. In this paper we discussed the design and simulation of a UHF RFID tag and system that complies with the EPCglobal, Class-1, Generation-2 specifi cation. It was found that circuit performance on par with modern commercial RFID tag chips was achieved using the TSMC 0.18µm CMOS process. The paper included an antenna design that provides conjugate match with the input impedance of the rectifier. The paper closed with a top-level verifi cation that combines behavioral modeling, HFSS antenna system modeling, plus Nexxim transient simulation, showing that the design provides reliable DC power and demodulated signals for both uplink and downlink. Submitted by Ansoft Corporation Click Here To Download (File Size: 1.16 MB) :
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