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本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯 , y+ ^, R1 [3 K2 D4 @+ n' h1 ], w
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C2 CC1200高清编解码芯片
# m! m3 _) ?9 G; xCC1200 Media Processor Famiy
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! p8 \. s L" D7 s7 {* XCC1200 Family6 U+ x# N# x. d6 }1 N( d
1 E N I t! p. O. Z6 h) YCC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance. 7 C; Q2 a4 ~7 c' G0 M3 `' A
+ \ U' e6 O$ U x o% VFeatures
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High applications and media processing performance
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Dual Core SMP 4-way superscalar RISC architecture @ 350 MHz % F3 Q9 K4 W) ?' {; D ~/ l% }% X
Dual hardware threads per core
6 g, \& ~6 r1 @+ _( F1 ^* m$ U256-bit SIMD Vector Unit
, A2 L A' `* m, g0 O5 iCodec Acceleration Processors for digital broadcast standards
& F# b; t. P5 o, ], z3 k$ {Motion estimation, entropy engines
8 I& s3 f! P# Y2D Graphics Accelerator with DirectFB, OpenVG 1.1 support
7 Y7 v# A5 ~3 O2 J9 A2 LDisplay Processor
- s2 b3 Z; ~1 y7 ]) X) N/ BSecurity Processor
# p# [1 t; O1 ~Extensive rich media codec support
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' C8 H' a. e3 T! dH.264, MPEG-2/4, VC-1, FLV, RM : H' H3 a# U( D( T! [0 h# [
Decoding of digital broadcast standards up to Full HD & q3 { F! K2 B9 b d" w
Decoding of internet content standards up to 720p
* i. y/ @* K7 kEncoding at D1 resolution and above
! t# g q, q4 v6 pHigh level of device integration
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0 U2 ~- D# e0 j6 X& y& qDRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB
L8 q, [! e' N4 V3 w' a* A6 ~Parallel NAND Flash ' P$ ~- X2 M: p& W$ F3 i8 h
Ethernet 10/100/1000M MAC with RMII/RGMII interface * ~! g5 M. K) c. Z. P
USB2.0 OTG ; B/ v9 x+ D3 w
PCI-Express: Ethernet/WiFi Q+ G/ @) Q8 j a* N0 V7 v
SDIO
9 r7 l1 z& h5 @) }MPEG-2 transport stream
) d7 y8 h- \8 T T1 Z. z8 M: f* c+ b. S8 mDigital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S
- Z: x Z# o- L- X+ ^5 rAnalog Video Out – YPbPr, CVBS / `$ @1 j: L0 ~# Q( n2 ?
Package: 27mm x 27 mm, Pb-Free / h/ V+ y" K9 l& z; G
CC1200 Block Diagram
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Supported Standards
) f9 p3 ^( A3 J" x+ FThe Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards! r: `' r( m3 Y. S; ?9 q
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