MIPS 多重執行緒SoC設計方法

jacky002

Agenda
7 x) p2 U& v# Q1 [0 P7 L- MIPS Update
- Why Multi-threading
0 K. R! _& f* C4 l) G; s- The MIPS32®34K™Core Family
: t+ v- y, t2 X2 z. J$ m- Value Proposition
! H) `: \) m" d- a/ I- Specifications
9 D, q5 D' I' g& c8 w8 j- Target Applications
. V' s& z* J0 l2 Z1 _: i- Usage Models
- Ecosystem Support
+ t* G2 ]+ X% r' d" `2 W0 c- Summary

8 w( N/ a7 w2 z8 i+ N; tPublishing Year: 2007
Total Pages: 27


8 j& R7 @- Y' X, I) K[ 本帖最後由 jacky002 於 2008-2-1 11:46 PM 編輯 ]

kevin

The 34K family implement MIPS's "MT" (multi-threading) ASE (application-specific engine).
0 y1 R1 W; X0 W4 KThe 34K cores can be configured with up to two VPEs (virtual processing elements).

tzuenhau

這些東西好珍貴看起來都很棒押
8 i8 u- _. A; v( ^1 @' U( j哀~我要如何才能邁向這些產業

masonchung

Single Core, Multi-threading
問題是 VPE 要如何設計呢?

hill33

感覺還不錯歐
下載來看看
謝謝你啊...................................