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jlhl1170

20位元BIN轉BCD的程式
LIBRARY IEEE;
1 U5 b: i3 V" N  p7 ]use IEEE.std_logic_1164.all;

entity bin2bcd is
8 R$ r  P7 [& }1 A& Q+ j* hport(
  data_in : in std_logic_vector(19 downto 0);
& H8 T3 V7 C7 q7 t$ k  EN : in std_logic;
; ^, [, y) }2 l2 V7 l3 C, o  data_out : out std_logic_vector(23 downto 0)
5 C$ t& i/ G3 H3 P+ z);
4 ~! l4 `5 `8 }% cend entity;
% u/ h. a- T+ f* M4 A( E
  H: {, ^5 v3 K/ p3 T& c
architecture bin2bcd of bin2bcd is
4 Z0 |2 s+ l3 x( ]0 t1 ^3 X, [3 i  nbegin

process(data_in, EN)
variable data_in_TEMP : std_logic_vector(2 downto 0);
/ g, U* G  T& A: dbegin
  data_in_TEMP := data_in(19 downto 1);
  y8 T9 Y. |1 s5 R' |  data_out  '0');
' w+ u  y/ E; P$ X$ n0 v  if EN='1' then
   case data_in_TEMP is
8 `2 a2 ?9 p. R4 {0 n    when "000" => data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out(23 downto 1)  data_out'0');
; u; I' D" u) Z3 X) v  v7 R, x' X   end case;
! c% U* c. K# i! F3 n: C4 m* P
, H/ c$ Z1 z. k   data_out(0) <= data_in(0);
  end if;
end process;

end architecture;


# v) m' h. T6 B) [" hCHECK的時候第一行跟if EN='1' then這行出現錯誤
9 `2 D# l0 a6 ]4 d( i會是什麼問題??

johson

variable data_in_TEMP : std_logic_vector(2 downto 0); ~~資料寬度 3 bits
data_in_TEMP := data_in(19 downto 1);~~資料寬度 19 bits ??
data_out  '0');~~????????目的為何????