|
補充:
' O6 Y1 t# j) L& |$ S; t G7 R6 n0 r! ~1. Reference Library: the reference libraries or Process Design Kits (PDK) where the symbol views of master cells are present. 既你想要用的symbol是來至哪個 library.
1 _. V9 g! z& G( v2. Syntax for Specifying Device Maps in a Device-Map File:. a" u; N; O9 o! f9 v
devMap := <primitive_device_name> <mapped_device_name>
$ N5 z. I" i. [; v( m, q- W1 j" ^, L [ propMatch := list_of_prop_to_match ]
B1 Z' `5 f# b [ termMap := list_of_terminals_to_map ]3 L( z6 l( B( G/ p6 r9 w, V
[ propMap := list_of_properties_to_map ]
+ O, n6 ?: {8 k# ^- X8 ]7 h8 w3 ] [ addProp := list_of_additional_properties_to_map ], I1 f. X+ a! X- e
Example:
+ H. J$ _8 \ V1 Y+ B' W; { devMap := resistor res
/ S M8 h! U/ I: w& I) k propMatch := r 20000
" j2 x- w6 z( U termMap := PLUS PLUS MINUS MINUS/ G9 P- V$ E4 ~5 }% O1 x5 J
propMap := subType type r resVal w width l length, S# R% r! k: @, _! c
addProp := model res |
|