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65nm FPGAs

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發表於 2006-12-6 09:34:27 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
New FPGA technology nodes roll out in an orderly sequence.  First, there is the secret "speculation" stage when hush-hush design secrets are locked in the lab.  Then, there is the "technology preview" stage when some limited details are leaked to the world.) d1 o* R" E% m+ ~% a& c+ E0 w

- J. H- V: K4 ^( P4 I- A- uNow, with 65nm, we are at the third stage - "announcement" where the details are divulged, but the devices are not yet available in volume.
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; q7 T! x+ h7 J6 Y& N/ p& STypically we next get samples and development systems, followed finally by volume production availability - usually at about the time the next round is being announced.: }( l8 b% P3 j+ b7 k! v
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Today's question asks when you will start looking at 65nm FPGAs for your design projects.
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