8:30 | 報到 |
9:00 | Session 1: SmartFusion Family and Design flow Introduction Rajiv Nema, Sr. Product Marketing Manager, Mixed-Signal FPGAs |
- Overview
) T3 I/ \ v$ p% W( q& }- Design Flows / c6 S0 [% q7 u, r
- Demo: Design Flow Demo and Tool Bring Up
1 {4 r* u$ Z& k3 Q/ d7 b# k- Embedded Design Flow |
10:45 | 休息 |
11:00 | Session 2: Leading 32bits MCU Development Tool – KEIL MDK Leon Chen, FAE, ARM Taiwan |
11:45 | Session 3: Designing with SmartFusion I Kevin Wen, Sr. FAE & Processor Specialist |
- Microcontroller Subsystem (MSS)0 w4 \" Z; |6 C$ q
- I/O Multiplexing |
12:30 | 午餐 |
1:30 | Session 3: Designing with SmartFusion II Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: running Sample Designs |
2:00 | Session 4: Analog Design Felix Chen, FAE |
- Analog Compute Engine (ACE)
5 Z6 h6 R. l" _( S: {- Demo: Reading POT values and displaying on HyperTerminal |
3:30 | 休息 |
3:35 | Session 5: FPGA Design Kevin Wen, Sr. FAE & Processor Specialist |
- Demo: Adding peripherals into the FPGA fabric |
4:30 | 會程結束 |