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A top-down design approach in IC industry comprises of three levels which includes: ; m" y$ k6 {7 D8 D* n
IC design (circuit-level), model / device(device-level), IC process technology(fabrication-level).1 V0 G' {' C- @( @
On the circuit-level,
2 A# Q5 Q t, I2 |( B4 q; X" D$ Ha compact model provides the external terminal electrical characteristics # J$ W8 K" h) d
resulted from the mathematic expressions of an electronic device.$ V: F8 a/ l+ n$ C/ E
The external terminal characteristics (Pin Characteristics) includes terminal voltages, currents or charges, / p% Q @9 k! ?# h# r2 p) ?. c
are featured as the input and output ports values.
, D) V" P/ G: e* CThe unknown ports values of a device are solved by a simulator when performing circuit analysis.
7 r3 o( t9 S- T+ UAfter the structure and behavior of the individual compact model is specified, the description(structure and behavior) are ' s& Q4 T% l" |( {* t
submit to the simulator. The simulator employees KCL and KVL to create a set of nonlinear equations. 2 c& a: b: ~& r1 R2 m
The nonlinear differential equations are not solved directly, but with approximation and iterative methods. Under certain
4 H- Z* c1 H9 }* }approximation, the equations are solved with the Newton-Raphson method. The solutions are equilibrium points of nodal analysis.
# R5 C( R/ J" B- x# zIC design engineers work on a higher abstraction level than the device(transistor) level.
/ O9 l5 {9 ~5 R- WIn other words, transistors are the primitive components in the eye of IC designer.7 A! M5 Q! L6 k6 }
A virtual symbol is the representive of a real device(component).9 B' X$ I* i3 a2 F
For instance, transistor's compact model is seen as a 4 pins symbol. % J; Y7 z4 {2 I. c0 ` ?- g
In Advanced Design System(ADS), three design types are allowed: schematic, symbol, and layout.# ?0 ?9 b9 }7 \- ^) t! f) i& l
Those designs can all be stored in a small containner names "cell" and a big containner names "library".
1 g# H3 J$ O. ?) v5 TIC designer works with the connection of some symbols in a schematic.* L$ S% T2 n1 ?9 @+ C- M# Z+ `
Each symbol represents an electronic device (component).
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% G* C9 u! ]3 k8 Q* fLittle knowledge of a device's internal structures and behaviours are required for IC designers. Because a device works as a funtional block. In stead, a device's external structures (connection) and behaviours are of concerns. ! c& x6 u3 @3 q; `. V1 U; B
On the fabrication-level, . p/ E8 ? I; @ E8 t, q$ _( u# |
a compact model has the internal description of the device characteristics by means of a set of physics-based expressions with
0 M6 V' O% d& ^' ptechnology dependent model parameters. The physic-based model parameters values accounts for the actual behavior and properties + f3 }4 S6 z7 s+ s. ~) C6 x! h
of a device are defined by its process variables such as: geometrical dimensions and doping profiles.
7 t$ y3 ^3 G: J! p$ t6 QThe true parameters values need to be carefully measured by the experimental setup of device characterization.
4 q1 J3 L/ Y: l9 rAccordingly,
. {' p2 i! q+ gthe verified compact models are expected to be implemented in simulators.
/ |: E/ ~, d5 G @0 [% aThus the modelling accuracy and computational efficiency that a simulator can provide to integrate circuits' analysis
: y' \) C8 D: tis the same as its implemented compact model. Meanwhile, a compact model is the most crucial process design kit, which plays as the interface between circuit designers and device developers. ' x9 Y! W) c0 A0 R9 ]! k
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