關於cell-based 流程的DRC問題

ywchywch

請問各位大大
我用TSMC18的design kit作cell-based layout的練習，軟體是用encounter，大部分的步驟是依照CIC所提供的Lab去做，完成之後用我的GDS檔去做DRC，會出現下列的DRC ERROR，而且是M1~M5、via1~via5都會有這方面的error，因為error的數目頗大，不太可能用人工去debug，所以我想請問有經驗的大大們，能不能告訴我最大的問題點在哪裡？以及這些錯誤代表什麼？要如何debug比較適合？
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先謝謝各位大大了!!感激不盡!!
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1. M2.W.1 { @ M2 width < 0.28
  INT M2 < 0.28 SINGULAR REGION ABUT < 90
}

7 F; |' r& E: l5 b, O, c9 y2. M2.S.1 { @ M2 spacing < 0.28
  EXT M2 < 0.28 ABUT < 90 SINGULAR REGION
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3. M2.S.2 { @ Wide M2 (>10um) min. to M2 < 0.6 um
. y: W9 v* P% Y  M2_S5 = SHRINK (SHRINK (SHRINK (SHRINK M2 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
  M2_G5 = GROW (GROW (GROW (GROW M2_S5 RIGHT BY 5) LEFT BY 5) TOP BY 5) BOTTOM BY 5
  M2_Wide = M2_G5 AND M2

  M2_Exp = SIZE M2_Wide BY 1 INSIDE OF M2 STEP 0.196
% ]1 K( Z9 F5 r* E1 _6 J7 c# E  M2_Branch = M2_Exp NOT M2_Wide
0 R! @$ C; m- V- ]4 j9 i: z- ]  M2_Branch_edge = M2_Branch COIN INSIDE EDGE M2
  M2_Check = M2 AND (SIZE M2_Exp BY 0.6)
  M2_Else = M2_Check NOT INTERACT M2_Exp
1 D7 I, k. C5 c; j& \9 R% r  M2_Extend = M2_Check NOT M2_Exp

6 n) W: |  p, I1 X( u; d  EXT M2_Wide M2_Else < 0.6 ABUT >0 <89.5 REGION
  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 OPPOSITE REGION
9 g$ X& ^+ P6 s( o/ f( P  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 CORNER REGION
7 m4 U! V  L7 h" K$ S2 T6 E$ J  EXT M2_Branch_edge M2_Else < 0.6 ABUT >0 <89.5 PROJ==0 REGION
9 P( R6 y- c9 U5 R1 j  A = EXT M2_Exp < 0.6 ABUT > 0 < 89.5 SPACE REGION
8 c; n! ]1 V9 T  V8 M) L  A NOT INTERACT M2_Extend
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- H0 t4 ^$ Y- O) p! O4. M2.E.1 { @ Min extension of a M2 region beyond a VIA1 region is 0.01 um
   ENC VIA1 M2 < 0.01 ABUT<90 SINGULAR
& B$ a# d% n% K0 R: k  d* j   VIA1 NOT M2   
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% T4 `) H# V* O0 ?5. M2.E.2 { @ Min extension of M2 end-of-line region beyond VIA1 region is 0.06um
7 N# I/ v* ], M' a" l# a' ^   X = ENC [VIA1] M2 < 0.06 ABUT < 90 OPPOSITE                // a narrow side
   INT X < 0.26 ABUT == 90 INTERSECTING ONLY       // adjacent narrow sides
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6. M2.A.1{ @ Min M2 area region < 0.202
  AREA M2 < 0.202
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// Density check M2.R.1 included at the end of this file
// VIA2 checks
//=============
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) O& u9 g4 a4 P0 W+ _7. VIA2.W.1 { @ VIA2 must be 0.26 x 0.26 um
  A = NOT RECTANGLE VIA2 == 0.26 BY == 0.26 ORTHOGONAL ONLY
  A OUTSIDE RNGX   // exclude from metal fuse protection ring area
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8. VIA2.S.1 { @ VIA2 SPACING < 0.26
: [4 d& b7 A: L1 c  EXT VIA2 < 0.26 ABUT < 90 SINGULAR REGION
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3 o+ U& e, z- z1 I5 F+ S9. VIA2.E.1 { @ Min extension of a M2 region beyond a VIA2 region is 0.01 um
. i9 ^, D" u$ m6 `  ENC VIA2 M2 < 0.01 ABUT<90 SINGULAR
+ x  N" e% k6 ?. ?  VIA2 NOT M2   
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) n, n* t7 |& Q7 t! u# R2 N10. VIA2.E.2 { @ Min extension of M2 end-of-line region beyond VIA2 region is 0.06 um
0 J# `! x; c3 F* `, L, z0 D   X = ENC [VIA2] M2 < 0.06 ABUT < 90 OPPOSITE         // a narrow side
   INT X < 0.26  ABUT == 90 INTERSECTING ONLY     // adjacent narrow sides
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motofatfat

我猜你試用APR軟體RUN出來ㄉ
應該是相同NET ㄉMetal space 和 via extension
不夠的問題,通常會用 skill file 來修正

michael6172

我覺得你打電話去CIC問工程師會比較快吧 ...