|
本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯
. Y8 F( @ i0 P3 D; {& e8 P" U; B
0 y# U5 [5 g7 g; \0 h9 ~6 m- E6 dC2 CC1200高清编解码芯片
2 P0 z6 R7 I$ \: B, l2 j* TCC1200 Media Processor Famiy
3 G3 k9 M2 [9 m5 K
- ^9 H! l3 p6 H; p6 _, d5 T0 Y" P1 w e8 v4 w8 ]1 m5 G8 U
; P+ y, k5 X" u6 z. o5 L : F* f+ b: Z. F7 T
3 {% G5 e4 p! M5 o3 C$ cCC1200 Family4 N8 J V/ A+ l( d5 } | V
J; o3 t5 e+ U% p' @ U$ i$ @& L5 N
CC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance. ; I1 `7 t5 n$ ~/ V- T9 R
9 |$ B% Y% G a' e5 T5 U
Features
% e- L# `1 {# K7 f+ G% @& t. U
0 y& K' o. \& U6 Z( r* h3 @; ZHigh applications and media processing performance . n+ x/ M0 k; ^; ~9 q# e5 Q
: S& w& @3 [8 \ @2 n' S
Dual Core SMP 4-way superscalar RISC architecture @ 350 MHz
) h( r' j7 a4 G8 c4 @Dual hardware threads per core
# m5 C5 c1 E* g+ Z5 R256-bit SIMD Vector Unit
) Q S. K1 R, l- o2 hCodec Acceleration Processors for digital broadcast standards / C5 ?# b7 D& C5 s: T
Motion estimation, entropy engines % U9 ?0 f1 `/ i$ P( o
2D Graphics Accelerator with DirectFB, OpenVG 1.1 support
" B. R, Z! v! hDisplay Processor + M c' p9 Z) J' o9 `
Security Processor
& u( n2 v' j: n8 Q/ dExtensive rich media codec support
% a0 e& i) c: u/ [, {5 x' { p3 h6 [; h1 p
H.264, MPEG-2/4, VC-1, FLV, RM
' V8 `/ R4 H8 ?* |+ h0 pDecoding of digital broadcast standards up to Full HD 9 L7 F) F3 s% K: e" z
Decoding of internet content standards up to 720p
' N5 B2 ] G/ g, H2 g# JEncoding at D1 resolution and above
0 C" k, E2 |& q+ _+ c* l2 a9 WHigh level of device integration ( t2 w3 _ A! [1 S# @2 ^7 o( U
( |. ?8 Q Y+ b. {+ E- B# o
DRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB * C9 s' [, T* b' o9 Z7 t& b
Parallel NAND Flash ( D' W& o0 E" b) M
Ethernet 10/100/1000M MAC with RMII/RGMII interface : D3 u0 W! N. o3 P# p2 A
USB2.0 OTG
5 l- a6 S/ h1 t$ }PCI-Express: Ethernet/WiFi ) D9 s. a& u! O3 m( A* n
SDIO
% K. l/ w) T, F& t+ T( PMPEG-2 transport stream
0 I% e! J- n3 w' U2 MDigital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S 1 z+ H' s( A. e3 r2 J
Analog Video Out – YPbPr, CVBS 0 I9 k% }6 Y# e" Z
Package: 27mm x 27 mm, Pb-Free
+ L3 Q/ M7 y/ p& ^7 i% A- W. r; `CC1200 Block Diagram
. o7 \" Y# L( ^! H$ H! E- R! `( F3 y6 _
Supported Standards4 p( n6 d! D) v$ d6 C
The Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards& W8 w( j) d0 X( R" D
|
本帖子中包含更多資源
您需要 登錄 才可以下載或查看,沒有帳號?申請會員
x
|