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A Thesis Presented to The Academic Faculty
4 E% v( k7 _7 e" PBy Dale Scott Douglas In Partial Fulfillment Of the Requirements for the Degree
0 X1 z* I* ^$ NMaster of Science in Electrical and Computer Engineering
0 }: a7 d) M% Q5 MGeorgia Institute of Technology
/ O& F" L4 ?* C1 g( y eDecember, 2008
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! }; W7 P$ ]1 z7 e' E5 CSUMMARY. |- K. m, Y/ N) l. e- ~) P' I
Sources of flicker noise generation in the cross-coupled negative resistance oscillator( O* y6 \- p& [0 Z3 w6 l. f
(NMOS, PMOS, and CMOS) are explored. Also, prior and current work in the area of
$ l# y2 n$ Y* t# U3 c* X6 gphase noise modeling is reviewed, including the work of Leeson, Hajimiri, Hegazi, and
6 \* Z& W& r( b# p5 Bothers, seeking the mechanisms by which flicker noise is upconverted.
# b W- E% j3 U) ]A Figure of Merit (FOM) methodology suitable to the 1/f3 phase noise region is also$ C, B: E r- \+ L
developed, which allows a new quantity, FOM1, to be defined. FOM1 is proportional to
1 X7 U+ F+ H6 F6 @4 {flicker noise upconverted, thus allowing the effectiveness of flicker noise upconversion
8 j# O3 h2 b9 d3 [suppression techniques to be evaluated, despite possibly changing bias points or tank Q,
# F0 ]; @* I f! I8 `which would change phase noise and FOM in the 1/f2 region./ n9 P7 I4 ?# }8 B
The work of Hajimiri is extended with a simple ΛDC estimator for the special case of
0 M& Q# Z: d; p& T! mLC CMOS oscillators. A method of adaptive control of an oscillator core is presented, as: n& i9 k6 k- \2 B
well, comprised of a CMOS oscillator with a digitally adjustable N and P width, and a
4 [' q1 Y! `6 z( Acircuit (which is essentially a tracking ADC) which repeatedly adjusts the relative N to P! J9 m" K3 K4 Z: n
width dependent on the ΛDC estimate to maintain the condition of minimum flicker noise; M$ j& s- H9 |' V$ i1 H
upconversion. A fixed calibration constant is sufficient to allow convergence to within1 R+ K% Q2 ^: @+ ]# J" X# j
0.7dB of optimal FOM1 for all cases of N width, for a varactorless oscillator test cell.' s0 s( U7 E, P9 f$ l
Finally, a circuit is proposed which would allow the flicker noise reduction technique
9 h# w+ J, S5 w" ~* [1 Cof cycling to accumulation to be applied to continuous time oscillators, but is not
7 |' Q4 P0 n1 J* r& @rigorously vetted. |
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