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65nm FPGAs

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發表於 2006-12-6 09:34:27 | 只看該作者 回帖獎勵 |倒序瀏覽 |閱讀模式
New FPGA technology nodes roll out in an orderly sequence.  First, there is the secret "speculation" stage when hush-hush design secrets are locked in the lab.  Then, there is the "technology preview" stage when some limited details are leaked to the world.8 h" A6 }) P# [8 \( x. [

1 \. I( a1 F9 Y" O1 |) W4 |1 tNow, with 65nm, we are at the third stage - "announcement" where the details are divulged, but the devices are not yet available in volume.! Y1 Y# @2 L  J: ^' b! Q
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Typically we next get samples and development systems, followed finally by volume production availability - usually at about the time the next round is being announced.
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; o+ R% a/ b* u+ V; @Today's question asks when you will start looking at 65nm FPGAs for your design projects.
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