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樓主: 賴永諭
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[問題求助] Sansen讀書會...

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61#
 樓主| 發表於 2024-6-6 11:12:29 | 只看該作者
Update 文件~& C& s) X8 E" r+ m  l
Two stage ring oscillator analysis
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62#
 樓主| 發表於 2024-6-6 11:16:57 | 只看該作者
Two stage ring oscillator analysis文件上傳~~8 ]6 t2 ]! c4 {7 `
63#
 樓主| 發表於 2024-6-7 10:04:08 | 只看該作者
本帖最後由 賴永諭 於 2024-6-7 10:05 AM 編輯
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賴永諭 發表於 2024-6-6 11:16 AM; ?1 S. T, C7 g. u. n. {
Two stage ring oscillator analysis文件上傳~~

$ y0 T+ j+ B8 W2 ]7 c3 sTwo stage ring oscillator analysis文件上傳~~
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64#
 樓主| 發表於 2024-8-30 17:19:57 | 只看該作者
slide 10100 E, N( h3 F& S- R+ Z: g
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For a CFB amplifier the open-loop gain is ZT and its feedback factor is 1/RF, making the loop-gain TCFB = ZT/RF. : @, o! j/ k# h; H" ~; k; d
The signal bandwidth is determined by RF and not by the circuit gain.# k" }0 q! N6 B) d" z+ d5 M6 f" W" S% j
The circuit gain is independently set with RS.( V4 E5 ~: `+ q( B
The signal bandwidth remains stable for all gain settings .
# s% N% j4 `( s$ O  MEven for unity-gain operation, an RF resistor is required.
1 G! y1 T( V0 g$ I+ v0 LThe best practice when designing with CFB op-amps is to use the RF values given in the datasheet and to adjust the desired gain level through RS.) T8 S+ B* H0 N8 r
65#
 樓主| 發表於 2024-9-9 10:21:54 | 只看該作者
slide 1020
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(1) The closed-loop gain can be modified by changing RS, leaving the closed-loop bandwidth unchanged.* v( X& O$ T8 Y) n7 d0 a5 O9 z
(2) For a given RF, frequency compensation can be optimized.
2 i5 \9 t: U5 C. ](3)Suitable for high frequency applications.$ F6 G. b% l& W( j1 v
66#
 樓主| 發表於 2024-9-27 16:33:16 | 只看該作者
silde 1557:% \- N) m% Y( \9 M8 E
1. Input offset: Bipolar is better than MOS& P5 M6 k5 U( C6 ^) z5 f& O! T
KT/C = 26mV << MOS Vov  p( B5 X8 u0 j+ C& y
2. Mismatch 造成Randon offset $ C* M2 O  x( @0 a
3. 電路不對稱所造成Systematic offset
67#
 樓主| 發表於 2024-10-17 15:43:59 | 只看該作者
本帖最後由 賴永諭 於 2024-10-17 03:48 PM 編輯
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slide 215-216* }0 M. ^  N( n3 t4 y
1. Signal 的輸入雜訊直接到輸出' D  N# b/ m6 o" `, ^5 h1 C9 C( S% M
2. DAC 的輸出雜訊也直接到輸出/ v. I- u) j  D9 I
3. Quantizer noise 才有noise shaping 到輸出
68#
 樓主| 發表於 2024-10-18 14:26:49 | 只看該作者
slide 218
5 k" @7 w5 B9 e/ t0 {+ T0 X% k3 m1. First order Sigma-Delta patterns in the output spectrum" A& y! g+ O& H# d. V- p
=> Idle tones(pattern noise, limit cycles)$ l: j, d0 S# M7 |5 o" ^" x4 ~
2. Second order Sigma-delta 輸入太大時還是會不穩定
69#
 樓主| 發表於 2024-11-12 17:58:39 | 只看該作者
slide 1756:
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1.SC積分器的BW=(Feedback factor) X Gm/Ceff2 ^1 i: P% }1 u' i0 w
2.Feedback factor=Cf/(Cf+Cs+Cp)=Beta
; @2 z. x7 G" I6 J; c2 ]% y3.Ceff=(Cf串(Cs並Cp)): Cf回授電容,Cs取樣電容,Cp 輸入開關電容求和節點處的寄生電容$ p+ l, R! F8 ]* b, M; C
4.Integration期間的GBW=BetaXGm/Ceff4 ~. _, ]% M9 H) ^7 J& W& `
5.Integration期間的SR=Io/Ceff(Io opamp 輸出電流)
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