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本帖最後由 masonchung 於 2010-1-21 09:23 AM 編輯
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C2 CC1200高清编解码芯片2 C7 g/ `. {+ Q/ ^: \
CC1200 Media Processor Famiy
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0 c* o" X, s, |CC1200 Family
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CC1200 is C2 Microsystems’ second generation media processor family for Full HD video applications. It is based on the innovative Jazz 2 architecture, which is optimized for next-generation high-definition broadcast services and broadband rich media applications. CC1200 decodes all current broadcast formats and a wide variety of Internet content formats and performs high quality audio post-processing and video de-interlacing and scaling for high-definition display. CC1200 transcodes content into several formats for place-shifting and for side-loading onto portable devices. CC1200 encodes video for video monitoring, video chat and place shifting applications. CC1200 has a dual-core Symmetric Multiprocessor (SMP) which, with hardware acceleration of graphics operations, delivers very high applications processing performance. 2 K) d9 z+ R" x* U3 T: {; F6 l
* }- v+ S$ b" o: o0 i8 }7 FFeatures
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( W+ Q7 K4 I7 g' U# P, QHigh applications and media processing performance
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Dual Core SMP 4-way superscalar RISC architecture @ 350 MHz 1 H0 r7 j2 M9 S4 j6 L. Z" b
Dual hardware threads per core
+ ^8 w E6 u' ~" C2 @256-bit SIMD Vector Unit 4 G! U' S* M: v( E! U; V" `% b8 D
Codec Acceleration Processors for digital broadcast standards
% A( m- Q5 V0 d6 U) hMotion estimation, entropy engines
. J; a2 X3 Q7 S& {9 {! ?9 i5 c) K/ |2D Graphics Accelerator with DirectFB, OpenVG 1.1 support # f( R0 |( G0 @; `" U6 J
Display Processor
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Extensive rich media codec support
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H.264, MPEG-2/4, VC-1, FLV, RM
8 j9 m& D! y$ Y- gDecoding of digital broadcast standards up to Full HD
: g( |: f3 q/ R6 v1 o+ g6 V: x* `Decoding of internet content standards up to 720p , v4 ^, u7 |+ m9 T. W7 I6 D) X
Encoding at D1 resolution and above
6 }! y" F$ }& u& ]( X# UHigh level of device integration 9 Z2 N9 }. q, U2 a! Q4 A% n
! `2 }* B$ B2 }$ \ E+ zDRAM Memory: 64-/32-bit DDR2 @ 400MHz, 128-512 MB % z1 y$ I4 M) o9 j1 ^7 t
Parallel NAND Flash
* v, e, u" P) g2 \$ L; C& q6 a2 lEthernet 10/100/1000M MAC with RMII/RGMII interface * b" M% y I" {* t& s' Q
USB2.0 OTG 0 y c5 F7 U' y7 y1 Z* d
PCI-Express: Ethernet/WiFi
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~9 ?: X% G3 J5 K3 mMPEG-2 transport stream
5 M1 e; H ~% W {4 t6 R aDigital A/V – HDMI, BT-656/BT-1120, SPDIF, I2S : q f5 g6 K( N
Analog Video Out – YPbPr, CVBS ?+ h; ?# E% H& H; a! x
Package: 27mm x 27 mm, Pb-Free
/ l+ `' x! Q9 mCC1200 Block Diagram8 s7 F5 z H/ R+ e
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The Jazz media processor architecture permits the encoding and decoding of a wide range of video and audio compression standards. `, |# V6 x2 j1 h0 {, d* m- X
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